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Subject:
From:
Tan Geok Ang <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Tan Geok Ang <[log in to unmask]>
Date:
Wed, 23 Sep 2009 09:36:41 +0800
Content-Type:
text/plain
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text/plain (405 lines)
With nitrogen reflow, it will help to reduce the issue. 
If you use a soft eraser to rub the surface of land pads on the
secondary side of the board after the first reflow process, the poor
wetting issue will be eliminated/ reduced.  

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee parker
Sent: Wednesday, 23 September 2009 4:39 AM
To: [log in to unmask]
Subject: Re: [TN] Imm Sn soldering issue.

George

Thank you for your interest. Actually I have seen these issues occur on
nearly every finish except solder plated boards ( going back to the dark
ages). The occurrence has diminished over the years, but it still
happens. My guess is it may never be completely resolved as the first
reaction is to point fingers at the other guy.

Best regards
Lee
J. L. Parker Ph. D.
JLP Consultants LLC
804 779 3389  
  ----- Original Message ----- 
  From: Wenger, George M.<mailto:[log in to unmask]> 
  To: TechNet E-Mail Forum<mailto:[log in to unmask]> ; Lee
parker<mailto:[log in to unmask]> 
  Sent: Tuesday, September 22, 2009 4:31 PM
  Subject: RE: [TN] Imm Sn soldering issue.


  Lee,

  Okay now that I read you whole response I can see the issues you're
  talking about and they do have application with both surface finishes.
  It's just that when you said "you may have problems other than the
  immersion silver surface" I thought you misread what surface finish
  Peter asked his question about.

  Regards,
  George
  George M. Wenger
  Andrew Solutions
  Senior Principal FMA / Reliability Engineer
  40 Technology Drive, Warren, NJ 07059
  (908) 546-4531 [Office]  (732) 309-8964 [Cell]
  [log in to unmask]<mailto:[log in to unmask]>
   

  -----Original Message-----
  From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee parker
  Sent: Tuesday, September 22, 2009 4:25 PM
  To: [log in to unmask]<mailto:[log in to unmask]>
  Subject: Re: [TN] Imm Sn soldering issue.

  George

  I am aware of that, but my suggests have potential application in
either
  case.

  Best regards
  Lee
  J. L. Parker Ph. D.
  JLP Consultants LLC
  804 779 3389  
    ----- Original Message ----- 
    From: Wenger, George
M.<mailto:[log in to unmask]<mailto:[log in to unmask]>> 
    To: TechNet E-Mail
Forum<mailto:[log in to unmask]<mailto:[log in to unmask]>> ; Lee
  parker<mailto:[log in to unmask]<mailto:[log in to unmask]>> 
    Sent: Tuesday, September 22, 2009 3:21 PM
    Subject: RE: [TN] Imm Sn soldering issue.


    Lee,

    Peter is having problems with immersion TIN not immersion SILVER

    Regards,
    George
    George M. Wenger
    Andrew Solutions
    Senior Principal FMA / Reliability Engineer
    40 Technology Drive, Warren, NJ 07059
    (908) 546-4531 [Office]  (732) 309-8964 [Cell]
 
[log in to unmask]<mailto:[log in to unmask]<mailto:george.w
[log in to unmask]:[log in to unmask]>>
     
    -----Original Message-----
    From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee parker
    Sent: Tuesday, September 22, 2009 3:03 PM
    To:
[log in to unmask]<mailto:[log in to unmask]<mailto:[log in to unmask]:T
[log in to unmask]>>
    Subject: Re: [TN] Imm Sn soldering issue.

    Peter you mentioned that the defects are normally on the second
side.
  I
    was also wondering if the defects are usually associated with the
same
    features. If so you may have problems other than the immersion
silver
    surface. Issues I have uncovered are soldermask residues and
soldering
    fixtures (if you are using fixtures) that prevent contact of the
board
    and the solder. I suggest that the next time this occurs you process
a
    bare board with no no soldermask or fixturing and see if you get the
    same result. Quite often I do not.

    Best regards
    Lee
    J. L. Parker Ph. D.
    JLP Consultants LLC
    804 779 3389
      ----- Original Message ----- 
      From: Peter
Barton<mailto:[log in to unmask]<mailto:[log in to unmask]<mailto:[log in to unmask]
%3Cmailto:[log in to unmask]>>> 
      To:
 
[log in to unmask]<mailto:[log in to unmask]<mailto:[log in to unmask]:T
<mailto:[log in to unmask]:[log in to unmask]:[log in to unmask]
G%3Cmailto:T>
  [log in to unmask]<mailto:[log in to unmask]>>> 
      Sent: Tuesday, September 22, 2009 12:33 PM
      Subject: [TN] Imm Sn soldering issue.


      Dear Technetters,

      Hopefully there is someone out there who can help me understand a
  very
    specific issue we have using PCB's plated with Imm Sn. namely,
    non-wetting of solder to some lands on the second side of population
    after reflow. We have an understanding of this surface finish with
    respect to the assembly processes. We are careful how we handle the
    unpopulated PCB's, the PCB's are shipped directly to the line and
are
    only removed from the manufacturer's packaging at the point of use.
  They
    are not pre-baked and are subjected to 2 relatively benign reflow
    cycles.

      We only ever see the issue on the second side. It occurs on
various
    component types. When it does occur the solder deposited at the
  printing
    stage is reflowed and is attached to the component termination,
    favouring this as more wettable than the PCB land. The problem does
  not
    always occur. The assembly is populated in 2 up panels and we have
    examples where one panel has soldered joints across the piece,
whilst
    the other PCB in the same panel exhibits non wetting in some areas.

      The assembly has been profiled with a good distribution of
    thermocouples on a sample assembly to confirm a low delta T and the
    profile itself is right at the centre of the paste manufacturer's
    recommendations. We like to have a good process window.

      I am aware that the 2 possible reasons for this condition are (a)
    thermal degradation of the finish and (b) possible plating quality
    issues.

      We have dismissed excessive thermal input as these have only been
    subjected to 2 non-RoHS thermal cycles and the PCB's are fresh from
  the
    manufacturer. Peak temperatures are only around the 227 deg. C mark.
  The
    Sn thickness specification is 0.8 - 1.2 uM. The applied thickness
has
    been measured using XRF as a process control and averages 1.0 uM. I
am
    aware that XRF is only a guide as it cannot segregate out
'available'
    pure Sn from Sn/Cu intermetallics.

      We have had an independent lab analysis conducted and example
lands
    where this condition is seen are shown to have very little or no
    remaining Sn at the surface, the majority being Sn/Cu
intermetallics.
    Other unpopulated plated areas have also been subjected to SEM and
EDX
    for comparison and exhibit what is described as 'islands' of Sn in a
  sea
    of Cu/Sn intermetallics.

      We have not had 'virgin' PCB's analysed yet for comparison as it
is
    costly and we are not sure if we would pick the correct example to
  look
    at - it could be a good one.

      For the PCB experts out there out there I have a couple of
  questions:

      1. If the application of Sn is a displacement reaction with the
    underlying Cu is there any way that there can be less Sn on some
  surface
    areas than others?

      2. Are there other reasons that there could be variation in Sn
    deposits or could lead to the 'islands' of Sn as described by our
lab
    that is seen after thermal processing?

      3. Are we missing anything else?

      Any questions please feel free to ask - this is causing me the
  biggest
    headache going.

      Peter Barton
      Senior Process Engineer
      ACW Technology Ltd
      Dinas Isaf West
      Tonypandy
      Mid Glamorgan
      CF40 1XX

      Tel: 01443 425275 (direct)
      Fax 02380 484882
   
 
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