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Subject:
From:
Kenneth Wood <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Kenneth Wood <[log in to unmask]>
Date:
Fri, 18 Sep 2009 08:04:19 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (397 lines)
The top side GND plane discussion was targeting HDI designs specifically
where you are using micro vias-in-pad on micro-BGA's.
If you are using a dog bone fan-out on then you most likely will not be able
to flood under the BGA.
Ken

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of John Burke
Sent: Thursday, September 17, 2009 8:15 PM
To: [log in to unmask]
Subject: Re: [TN] Ground Pour Under BGA

1)
The answer to that would (unfortunately) depend on a number of factors
mainly concerned with whether it was :
A....being used to shield outgoing emissions from the board
B....being used to increase the thermal transfer away from the component.

In the case of B, you would need to be trying to build in margin on a design
in order to minimise the max die temperature. Personally on BGA designs that
I am working on, the BGA's themselves are surrounded by bigger BGA's with
even more power dissipation so I tend to control the assembly thermally by
the use of very large heat sinks which are actually a part of the equipment
housing (aluminium) connected to the top of the components and rely on a
relatively low theta jc of the package. In the environment where these are
used it is unfortunately not generally possible to rely on this flooding
approach since the whole of the ambient environment can be above 85
centigrade, and in any case there is effectively nowhere to transfer the
heat to in this environment by sinking it into the board (Imagine a board
sandwiched inside a "cocoon" of an aluminum casting, hermetically sealed, no
airflow, with the Outside (ambient air no airflow) wall of the cocoon
housing at 85 centigrade.

On Item 2 how much is an interesting term, the resistance of the system is
more of a factor, since spreading copper under a component in isolatruion is
not much use. It would depend to a large extent on what the theta jb of the
package was and the construction of the vias from the copper flood area to
the ground plane in the board, the extent of the flood area outside the
package boundary, airflow availability and of course the construction of the
the ground plane itself. The resistance of the copper flood area that part
of the system is of course given by L/k*A. 


John Burke
(408) 515 4992


-----Original Message-----
From: Inge [mailto:[log in to unmask]] 
Sent: Thursday, September 17, 2009 12:17 PM
To: TechNet E-Mail Forum; John Burke
Subject: Re: [TN] Ground Pour Under BGA

OK John,

then I want to know:

1) WHEN do you decide to use the discussed under-chip RTN plane?

2) HOW MUCH does this plane contribute to the power dissipation
transportation?

Inge


----- Original Message -----
From: "John Burke" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, September 17, 2009 6:04 PM
Subject: Re: [TN] Ground Pour Under BGA


> 1)what's the benefit with a groundplane (that looks more like a copper
> net)under chip, when the whole BGA has a thick metal plate all over the 
> BGA.
> That metal sheet is mainly for cooling and stabilizing the body
> mechanically, but isn't this cover  also a effective ground plane and a
> electrostatic shield?
>
> Used for heatsinking for the chip and to reduce EMI emmissions from
> the signal traces in the board, ground plane effect of the metal sheet 
> cover
> depends on the construction (i.e. is it "connected" or floating) same
> comment for the ESD shield comment.
>
> 2)will such an extra groundplane under chip make 3D X-raying even harder 
> to
> read, e.g. bond wires, which are already hard to inspect due to the 
> massive
> top metal plate.
>
> Yes it will, bond wires are difficult to inspect particularly when
> they are dual row bonded and are "crossing" adding a metal shield does not
> help this although on the BGA's that we make the shield is only a 0.3mm
> thich coper material and we can x-ray straight through it since we are 
> usign
> gold bond wires.
>
> John Burke
> (408) 515 4992
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Hernefjord Ingemar
> Sent: Thursday, September 17, 2009 1:33 AM
> To: [log in to unmask]
> Subject: Re: [TN] Ground Pour Under BGA
>
> Hi,
> CADing boards is not my job, but I became curious when I read your 
> pingpong.
> We have a board with a number of SuperBGAs, number of balls about 660.Vias
> in pad.  I  have two questions for you professionals. 1)what's the benefit
> with a groundplane (that looks more like a copper net)under chip, when the
> whole BGA has a thick metal plate all over the BGA. That metal sheet is
> mainly for cooling and stabilizing the body mechanically, but isn't this
> cover  also a effective ground plane and a electrostatic shield? 2)will 
> such
> an extra groundplane under chip make 3D X-raying even harder to read, e.g.
> bond wires, which are already hard to inspect due to the massive top metal
> plate.
> Sorry for disturbing you with such trivia.
> /Inge
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Dwight Mattix
> Sent: onsdag 16 september 2009 17:26
> To: [log in to unmask]
> Subject: Re: [TN] Ground Pour Under BGA
>
> yes. If BGA pitch is large enough then it makes nice little pwr/gnd island
> with some distributed capacitance directly under the device (available 
> with
> very low inductance).
> When picking and choosing which of several device voltages to locate 
> thusly,
> for greatest benefit use it for the heavy fast currents (e.g.
> core voltages).
>
> At 07:16 AM 9/16/2009, Kenneth Wood wrote:
>>Keep in mind that on HDI designs you are not JUST adding a few micro
>>vias and pouring GND on the top layer...you are using via-in-pad on all
>>devices so to try and minimize top side pour cuts. Also, you are
>>routing as many nets on internal layers as possible.
>>The top layer GND is not usually the only GND plane too, there is
>>usually an internal plane to back up the top layer.
>>This does reduce EMI significantly, shorter runs and external shielding
>>works.
>>Ken
>>Saturn PCB Design, Inc.
>>www.saturnpcb.com
>>
>>
>>
>>-----Original Message-----
>>From: TechNet [mailto:[log in to unmask]] On Behalf Of Robert Kondner
>>Sent: Wednesday, September 16, 2009 10:07 AM
>>To: [log in to unmask]
>>Subject: Re: [TN] Ground Pour Under BGA
>>
>>Ken,
>>
>>   With all the BGA pads and possible vias I don't see how a top side
>>can have a better mesh of copper paths than an internal layer. I would
>>think a poor copper mesh plane would be a generator of large GND return
>>loops. Aka antennas.
>>
>>  As for a GND plane being a few mils closer to the BGA and this
>>reducing EMI, that sounds like hog wash. Consider that conductor
>>lengths from a ball to chip is probably about 1/2 inch at times. How is
>>adding 10 mils going to affect anything?
>>
>>  I am open to Hog Wash ideas but they need to be well defined.
>>
>>Thanks,
>>Bob Kondner
>>
>>
>>-----Original Message-----
>>From: TechNet [mailto:[log in to unmask]] On Behalf Of Kenneth Wood
>>Sent: Wednesday, September 16, 2009 9:54 AM
>>To: [log in to unmask]
>>Subject: Re: [TN] Ground Pour Under BGA
>>
>>It is an technique used in HDI designs that utilize micro vias.
>>Top layer is GND and layer 2 can be a power layer. It also helps with EMI.
>>Ken
>>Saturn PCB Design, Inc.
>>www.saturnpcb.com
>>
>>
>>-----Original Message-----
>>From: TechNet [mailto:[log in to unmask]] On Behalf Of Robert Kondner
>>Sent: Wednesday, September 16, 2009 8:42 AM
>>To: [log in to unmask]
>>Subject: Re: [TN] Ground Pour Under BGA
>>
>>Hi,
>>
>>   What would be the goal of placing atop side GND plane under the BGA?
>>
>>   Low Z Gnd return? Electrostatic shield?
>>
>>   Having a plane under the BGA vs another layer is not going to make a
>>difference in plane Z.
>>
>>  Sounds like a good chance of creating shorts if the solder mask chips
>>or is damaged during rework.
>>
>>Bob Kondner
>>
>>-----Original Message-----
>>From: TechNet [mailto:[log in to unmask]] On Behalf Of Guy Ramsey
>>Sent: Wednesday, September 16, 2009 7:43 AM
>>To: [log in to unmask]
>>Subject: Re: [TN] Ground Pour Under BGA
>>
>>IPC 7095, BGA Technology by Lau.
>>
>>-----Original Message-----
>>From: TechNet [mailto:[log in to unmask]] On Behalf Of Toby Carrier
>>Sent: Tuesday, September 15, 2009 8:45 PM
>>To: [log in to unmask]
>>Subject: [TN] Ground Pour Under BGA
>>
>>Hello all,
>>
>>Is it a good idea to create a top layer ground flood under a BGA
>>package? I am guessing that the fanout will not allow much area for the
>>ground pour, am I correct in thinking so? Does anyone have any good
>>reference info on this topic?
>>
>>Also, if you don't have a ground pour under the BGA, how will that
>>affect the impedance control of the traces going to the BGA ball?
>>
>>Thanks for the help,
>>
>>Toby
>>
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