Did you say "production environment?"

ruh-rohhh
/scooby doo voice off

Assuming solid 14x14 array with no open rows and PTH with single 
track 3/3 l/s escape routing.

.65mm pitch = 25.6 mil spacing
3/3/3 space/line/space = takeaway 9 mils from 25.6

Leaves room for drill pad = 16.9 mils

Drill + 10 is general rule for production so that means a 6-7 mil 
through drill?

That's without considering power and isolation requirements and 
additional layers to manage other hookup issues.
Minimum 7 rows/7 layers minimum just to escape from the device 
center. More likely 8-9 routing layers.


can you say "uVias?"   .:-)


At 07:22 AM 8/3/2009, Barbara Burcham wrote:
>I am working on a layout that has a 0.65mm 14x14 matrix bga on an 0.062
>thick board. I have to be able to place through hole vias between the pads.
>Would love to use 3 and 3 spacing.
>Who out there can advise me about this?
>Yes, the board HAS to be 0.062 thk...has a card edge connector...but can be
>on the low side of that.
>Yes, we really want to use through hole vias.
>We can use 1/2 oz copper on all 8 layers.
>The board is small and can easily be run on a smaller production panel to
>improve tolerances.
>So, how small a capture pad and hole can be done in a production
>environment, reliably?
>Need to get this nailed down today.
>
>Barbara Burcham, C.I.D.
>pcb Trace Design
>281-341-7539 Wk/Hm
>713-249-7718 Cell
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