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August 2009

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TechNet E-Mail Forum <[log in to unmask]>, Inge <[log in to unmask]>
Date:
Wed, 19 Aug 2009 22:07:55 +0200
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Craig,
You often see conductors extremly close to the edge in order to use as much 
as possible of the area. Understandable but risky. The edges are sensitive 
to touching leading rails, mechanicl damage by handling and cracks in the 
coating etc. Therefore, our guys have decided own rules, hence we have a 
minimum of 1 millimeter as a safety distance for signals and data traces and 
5 millimeters for power lines.
Inge

----- Original Message ----- 
From: "Craig Sullivan" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, August 19, 2009 9:34 PM
Subject: [TN] Minimum Conductor to PCB edge distance


I can't seem to find this information in any IPC document, unless I am
obviously overlooking it.

We have a PCB customer designed with a trace close to the board edge
(0.013"). However, when the board is scored for depaneling, the score width
reduces the distance to around 0.005" - 0.007".

Can anyone recommend a reference or design guideline that specifies
something like this? Something that may specify how close features can be
placed to the board edge?

We have our own guidelines for DFA, and generally speaking, we've never run
into anything this tight where it's become a cause for concern. But there's
also a first time I suppose.

Thanks in advance for the input.
Craig

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