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August 2009

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Subject:
From:
Craig Sullivan <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Craig Sullivan <[log in to unmask]>
Date:
Wed, 19 Aug 2009 14:34:42 -0500
Content-Type:
text/plain
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text/plain (28 lines)
I can't seem to find this information in any IPC document, unless I am
obviously overlooking it.

We have a PCB customer designed with a trace close to the board edge
(0.013"). However, when the board is scored for depaneling, the score width
reduces the distance to around 0.005" - 0.007".

Can anyone recommend a reference or design guideline that specifies
something like this? Something that may specify how close features can be
placed to the board edge?

We have our own guidelines for DFA, and generally speaking, we've never run
into anything this tight where it's become a cause for concern. But there's
also a first time I suppose.

Thanks in advance for the input.
Craig

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