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August 2009

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Subject:
From:
Steven Creswick <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Steven Creswick <[log in to unmask]>
Date:
Thu, 6 Aug 2009 13:23:18 -0400
Content-Type:
text/plain
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text/plain (201 lines)
Victor,

Here are a few additional closing thoughts on your situation.  

I believed that I would ask you to re-consider my original suggestion to
look at Mil-Std 883, TM 2010, para 3.1.3 b, c, and/or f for class B.  No
crack shall be > 5 mils in length [plus others].

Although the spec is written around an IC [ie - a very thin active region
resting on top of a very thick ohmic base] one could reasonably argue that
the base of a diode is just as 'active' as the top surface and apply the
same rules down there, as up above.  I don't recall ever having a situation
that drove me to this, but it would seem reasonable to do so, even if the
diode were some type of mesa diode or something.  

Para 3.2.3.2 talks about cracking of the die attach material


TM 2012, Para 3.10.2.2 has comments about cracks and undercutting, but I
doubt your parts are that severe.


I believe all the stuff we had for scalloping was internally derived.  Just
guessing that what you are seeing are small, almost vertical scallops in the
device edge, that are only a few mils in dimension.  Those scallops, or
closed cracks most likely terminate at the die attach material.

On the other hand, if you had a crack which was horizontal in nature [going
into the body of the chip], my previous word of caution still applies
because once you have a crack, just a little CTE delta makes them larger
quite rapidly.

Inge may have more comments.  He is a wealth of info for hybrid and
microcircuit/microelectronics stuff.

Steve

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
Sent: Thursday, August 06, 2009 9:38 AM
To: [log in to unmask]
Subject: Re: [TN] die base chip outs / fractures
 
I was not able to retrieve MIL-PRF-38535F from the data base, doc not
found.   MIL-M-38510 did not include photos/sketches of acceptance
anomalies.   Any other suggestions.

Victor,

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Inge
Sent: Wednesday, August 05, 2009 3:38 PM
To: [log in to unmask]
Subject: Re: [TN] die base chip outs / fractures

I refer much to MIL-PRF-38535F and MIL-M-38510,  even if both are not
very 
in line with today's products.

/Inge


----- Original Message ----- 
From: "Steven Creswick" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, August 05, 2009 3:19 PM
Subject: Re: [TN] die base chip outs / fractures


> Victor,
>
> I am not sure what the IPC equivalent to MIL-STD-883 would be, but if
you
> refer to 883, TM 2010 - internal visual - monolithic, or TM 2017
internal
> visual - hybrid you may find what you are looking for.
>
> My recollection is that TM 2010 may provide the most info [para 3.1.3]
> although we were mostly concerned about chip-outs at the upper edge of
the
> chip, nearer to the active region.  You might consider the section on
flip
> chips for info as well.
>
> If the chips are diced with a diamond saw, one seldom [if ever] sees
> chipping along the bottom edge of the die unless there has been 
> mis-handling
> of the sawn wafer while still on the frame.  Mainly, don't want cracks

> going
> in the direction of the active region of the chip - [personally, don't

> want
> to see cracks AT ALL - especially, if you can see them with a
low-power
> scope, etc].
>
> We would not want to see loose bits of Si rattling around inside a
sealed
> hybrid.  If over-molded, it is not so likely to move anywhere...
>
> Interested in further detail of the chipping you are seeing.
>
> You should be able to down-load MIL-STD-883G from
> http://assist.daps.dla.mil/online/start/
> Once you get the user sign-on info.  It is a ~6 Mb file
>
> Steve
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
> Sent: Wednesday, August 05, 2009 8:16 AM
> To: [log in to unmask]
> Subject: [TN] die base chip outs / fractures
>
> Fellow TechNetters:
>
>   Is there an IPC documents pertaining to acceptance of anomalies with
> die.   I am see small cracks/chip out at the die to die attach region.
> How much chip out/ crack is allowed?
>
> Victor,
>
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