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July 2009

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Subject:
From:
Lee parker <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Lee parker <[log in to unmask]>
Date:
Thu, 30 Jul 2009 14:20:59 -0400
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Upton

I presented a paper at IPC and published it in PC Fab several years ago which analytically defined the parameters involved in plating through holes. There are several parameters controlling difficulty of plating; the D/AR is one such parameter. In this case it varies with the second power. There are others of equal importance. Before attempting this design you may want to review this paper and decide if the degree of difficulty is acceptable.

Best regards
Lee
J. L. Parker Ph. D.
JLP Consultants LLC
804 779 3389
  ----- Original Message ----- 
  From: Upton, Shawn<mailto:[log in to unmask]> 
  To: [log in to unmask]<mailto:[log in to unmask]> 
  Sent: Thursday, July 30, 2009 10:05 AM
  Subject: [TN] Via plating question


  Quick question: I usually have via's plated to a minimum of 1mil.  I
  have a high current design where I'd like to have those via's plated to
  2mil (near 2oz, to match the 2oz spec for the layers) -- but the board
  has some 15mil vias and is a 125mil thick board.  Would a typical board
  house be ok with this?  I don't care about getting those 15mil mil
  diameter via's to 2mil barrel plating, only the 32mil ones need to be
  that thick.

  Shawn Upton, KB1CKT
  Test Engineer
  Allegro MicroSystems, Inc
  [log in to unmask]<mailto:[log in to unmask]>
  603.626.2429/fax: 603.641.5336

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