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July 2009

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From:
Vladimir Igoshev <[log in to unmask]>
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Date:
Fri, 10 Jul 2009 12:52:51 +0000
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Particularly when there is a problem with the thermal solution (bad heat sink, poor adhesion to the die, etc).



Vladimir

SENTEC

SENTEC

11 Canadian Road, Unit 7.

Scarborough, ON M1R 5G1

Tel: (416) 899-1882

Fax: (905) 882-8812

www.sentec.ca





-----Original Message-----

From: "Post, Scott E" <[log in to unmask]>



Date:         Fri, 10 Jul 2009 08:38:10 

To: <[log in to unmask]>

Subject: Re: [TN] More Underfill Discussion





The product sees those kinds of temperatures in use.  It's an unusual

application temperature.



Scott Post

P.O.U. 1415-00M2-00P6

2151 E. Lincoln Road

Kokomo, Indiana    46904-9005

765-451-2983 (Phone)

765-451-0287 (FAX)



-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Werner Engelmaier /*

Sent: Friday, July 10, 2009 8:30 AM

To: [log in to unmask]

Subject: Re: [TN] More Underfill Discussion



 Hi Scott,

Why did you cycle to +150C?-that is well into the glass transition

region for most FR-4 resins, and thus renders the data useless for

extrapolation unless the actual product sees that kind of temperatures.

Werner





 





 



-----Original Message-----

From: Post, Scott E <[log in to unmask]>

To: [log in to unmask]

Sent: Fri, Jul 10, 2009 7:40 am

Subject: Re: [TN] More Underfill Discussion





















 

One problem I've seen with underfill voids between flipchip bumps (8-10

mil pitch) is solder extrusion into the void during thermal cycling.

I've seen the extrusion go far enough to cause shorts.  This was in

-40/+150C cycling, so quite a bit harsher than most situations.  Also,

it was SnPb solder.  I don't know if a SAC alloy would extrude so

readily.  As far as how long it took, I can't say for sure.  My tests

typically ran 3000 cycles and I found the extrusions in cross-sections

at the end of testing.  My monitoring equipment wasn't accurate enough

to pick up a partial short like this and, to be honest, I was looking

for increases in resistance, not decreases.



Scott Post

P.O.U. 1415-00M2-00P6

2151 E. Lincoln Road

Kokomo, Indiana    46904-9005

765-451-2983 (Phone)

765-451-0287 (FAX)



-----Original Message-----

From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian

Sent: Thursday, July 09, 2009 4:10 PM

To: [log in to unmask]

Subject: [TN] More Underfill Discussion



TechNetters,

Well I have been shopping to Class 2 people the draft we all built here

on TechNet of a standard for underfill workmanship.  Some are saying

they can't live with voids that only go 50% around the perimeter of a

solder ball, they want more leeway.  They also say they want to allow

voids connecting solder balls.  Now I put in the prohibition of the

latter because of the statement in the J-STD-030 "Guideline for

Selection and Application of Underfill Material for Flip Chip and Other

Micropackages", where it talks about unequal stresses put on the solder

balls when they is not 100 underfill coverage around each and every

ball.  My questions to you are: 

1) What is the physical evidence behind that statement in 030?

2) What was the magnitude of the deformation?

3) How long did it take?



My reason for the last question is if it takes 9 years for significant,

reliability impairing deformation to occur in a 20 year life product,

that is real bad.  But if it happens in the products with a 2 to 3 year

life product, why should we care?



Bev

RIM





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