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June 2009

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Subject:
From:
Charming Chan <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Charming Chan <[log in to unmask]>
Date:
Tue, 2 Jun 2009 23:06:25 +0800
Content-Type:
text/plain
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text/plain (47 lines)
Hello All, 

We performed thermal cycling test on a PCBA for reliability verification and
found separation/delamination under a SMD land when checking micro section
for structural integrity. The requirements about separation/delamination in
IPC-6012B are as follows. I'm quite confused about the definition on section
3.3.2.3 and section 3.6.2.5, so I am asking a favor here to make sure if
that separation/delamination after thermal cycling test is acceptable or
not. Thank you all for inputs.

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In spec IPC-6012B, section 3.3.2.3 says that "Delamination and blistering is
acceptable for all classes of end product provided the area affected by
imperfections does not exceed 1% of the board area on each side and does not
reduce the spacing between conductive patterns below the minimum conductor
spacing. There shall be no propagation of imperfections as a result of
thermal testing that replicates future assembly processes. For Class 2 and
3, the blister or delamination shall not span more than 25% of the distance
between adjacent conductive patterns. Refer to IPC-A-600 for more
information."

While, section 3.6.2.5 , in IPC-6012B, says that "Delamination or Blistering
For Class 2 and 3 there shall be no evidence of delamination or blistering.
For Class 1, if delamination or blistering is present, evaluate the entire
board per 3.3.2.3."
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By the way, the thermal cycling test attributes as follows.
10 minutes dwell time at 0C low temp, 10 minutes dwell time at 100C high
temp, 10 C/minute thermal gradient, 500 cycles.


Thanks & Best Regards
Charming Chan

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