Hi, Eric
If you think about it, a maximum will force the pad-edge to pad-edge
spec to go out of tolerance, as the pitch must remain a minimum with
respect to each other. That is why we all agreed a minimum pitch spacing
was appropriate. Pad diameter has to remain within spec also. But I
totally agree with the CpK approach; it should be applied to all of the
attributes (pad diameter, connecting trace width, finished via diameter,
copper thickness after etching, pitch, and co-planarity of finished
copper pads.
When you get into the business of performing ball attachment using
automated processes with laser, you quickly realize just how much slop
there is in the BGA industry. It has improved quite a bit due to the
interaction with TI, Intel, Raytheon, etc, etc.
Very little in the way of usable standards within JEDEC, especially for
flipchips and CSPs. But that just underscores what you stated about the
need for properly toleranced drawings.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Eric CHRISTISON
Sent: Wednesday, May 20, 2009 3:08 AM
To: [log in to unmask]
Subject: Re: [TN] Strange Tolerances on BGA Pitch-How to Accomodate the
Stencil File?
So if there's no maximum am I right in assuming an actual pitch of 2mm
would be acceptable :-)?
In my view there's no excuse for poorly toleranced drawings, either
ones with excessively slack tolerances or with missing information. The
manufacturer should hae Cpk data ofr their pitch measurements which will
allow them to quote a realistic tolerance.
Regards,
Stadem, Richard D. wrote:
> While doing the laser ball attachment on other BGAs, the company that
did it noted that there was up to a +- 3 mil deviation in the pitch in
earlier revisions of various BGA substrate drawings, so we asked for a
tighter spec for the center-to-center distance from the BGA substrate
fabricators because the laser is very precise and it is faster when the
machine does not have to autocorrect frequently. So instead of a
standard 1mm [.040"] with no tolerance (as an example), it became 1mm
[.040"] minimum to ensure no two pads were less than that from each
other, center-to-center. It should not affect your stencil file, in fact
it should help ensure your stencil artwork will be properly aligned by
ensuring less of a stackup variation in the artwork, the pad locations
on the BGA substrate, and the pad locations on the PWB substrate. This
was carried over to other BGA fabricators as well. If you check other
BGA drawings you will note the same wording. This is then flowed down to
the PWB design requirements, provided the CID diligently notes the
artwork requirements when specifying the BGA artwork on his/her PWB.
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of bob wettermann
> Sent: Tuesday, May 19, 2009 7:44 AM
> To: [log in to unmask]
> Subject: [TN] Strange Tolerances on BGA Pitch-How to Accomodate the
Stencil File?
>
> In working with some newer Intel BGA datasheets we
> Dear Technetters:
>
> In working with some newer Intel BGA datasheets we are noting tht the
pitch is indicated as a minimum dimension. For instance on a current job
the spec indicates "Min 1mm". Has anyone else seen this trend?
Explanations?
>
> How are you acoomodating your stencil files?
>
> Regards
> Bob Wettermann
> PH 847-767-5745
>
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--
Eric Christison Msc
Mechanical Engineer
Consumer & Micro group
Imaging Division
STMicroelectronics (R&D) Ltd
33 Pinkhill
Edinburgh EH12 7BF
United Kingdom
Tel: +44 (0)131 336 6165
Fax: + 44 (0)131 336 6001
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