The one bag for life is rather a simplistic and naïve view; in reality many pcbs are supplied vacuum wrapped in batches of some multiple, i.e. 5, 10 etc.
Secondly if you were to consider shipping each pcb in its own bag, the volumetric (envelope) requirement for the bare pcb will be far different in most cases to that of an assembled board.
Chris
-----Original Message-----
From: Leadfree [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D.
Sent: 14 May 2009 21:22
To: [log in to unmask]
Subject: Re: [LF] [TN] Bare PCB Packaging Requirements
LOL, thank you, friend Dewey. In fact, I am also a member of D-35, and I
provided quite a bit of material to the committee through John Perry
awhile back. Due to being so busy, and also because it is difficult for
me to hear very well in the teleconferences (I have a hearing
disability), I have simply been getting the draft revisions from John's
emails and getting my input back to John with an email response.
For the rest of you on the forum, I strongly suggest you read the work
this committee has done to date and provide your feedback. Read the
draft of IPC-1601 at
http://www.ipc.org/committeedetail.aspx?Committee=D-35. The inputs from
Dewey Whittaker, Dave Hillman, Sam Theabo, and many, many others are
coming together, and John is coordinating an excellent reference
standard in IPC-1601 that will help all of us.
-----Original Message-----
From: Whittaker, Dewey (EHCOE) [mailto:[log in to unmask]]
Sent: Thursday, May 14, 2009 2:57 PM
To: TechNet E-Mail Forum; Stadem, Richard D.
Subject: RE: [TN] Bare PCB Packaging Requirements
Richard,
Excellent reply. IPC-1601 is going to start stipulating that as a best
practice with hopes that the requirements become mandatory. We would
welcome your support or views on this committee. Any person self-assured
enough to state on a public forum that he is a friend of mine, is one to
whom we should pay heed to what he says.
Dewey
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D.
Sent: Thursday, May 14, 2009 12:12 PM
To: [log in to unmask]
Subject: Re: [TN] Bare PCB Packaging Requirements
1. The same moisture barrier bags that are ESD-safe Faraday bags also
work well as moisture barrier bags for shipping and storing PWBs. These
Faraday bags often work well for storage of the CCA during assembly. Why
use two different types of bags if one fits the bill? Non-ESD
polyethylene bags are notorious ESD generators. I wouldn't want them in
my factory.
2. Many CEMs and OEMs have requirements for the PWBs to be shipped in
MBBs, in order to prevent against surface finish oxidation in the case
of IAg, ISn, HASL and FTL finishes. Some invoke a requirement such as
IPC 4552 or 4553 in order to ensure the boards are dry and hermetically
sealed.
3. All PWBs absorb moisture from the air. Having the boards sealed
prevents excess moisture ingress, in some cases if the boards are
shipped in sealed bags with desiccant, the user may not need to pre-bake
if they are able to successfully perform Kanban pull from the fabricator
within a short time frame. This, of course, requires qualification and
validation of the process and procedures.
So, if a bag is required, use one from start to finish that meets
multiple requirements.
I assume you understand why moisture within the PWB is not a desirable
condition.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of John Parsons
Sent: Thursday, May 14, 2009 1:37 PM
To: [log in to unmask]
Subject: [TN] Bare PCB Packaging Requirements
Tell us, how many CEM's out there are demanding that bare PCB's be
received
in vacuum sealed moisture barrier anti-static bags. If so, what is your
reasoning? Just to be clear my focus here is "anti-static" not the
moisture
barrier properties of the packaging.
Regards
John Parsons
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