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April 2009

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Subject:
From:
"Upton, Shawn" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Upton, Shawn
Date:
Mon, 6 Apr 2009 15:24:48 -0400
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In the boards I've been designing, using at least the particular software that I use, "via's" are what are used to cross layers, while "pads" are holes that get component or wires soldered to.  So, pads might want thermal reliefs for soldering, while via's don't want the extra electrical resistance.

I'm not sure if this is just semantics, but I do know both types of holes exist on a board, and sometimes planes are stitched together for low resistance.  Would this matter?  As in, if I stitched some layers together, but don't care about those holes getting filled with solder, would it matter?

Shawn Upton, KB1CKT
Test Engineer
Allegro MicroSystems, Inc
[log in to unmask]
603.626.2429/fax: 603.641.5336

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Werner Engelmaier /*
Sent: Monday, April 06, 2009 3:14 PM
To: [log in to unmask]
Subject: Re: [TN] when do vias require a thermal relief


 Hi Dee,
Thermal relief is not specified within IPC documents, because the need for them is an "It depends."
As you note, the type of soldering process(es) used as has an impact, whether you solder SnPb or SAC makes a difference, whether you have BGAs or not, the thickness of the innerlayers, the drilled hole diameter-how would you specify all of this?

Werner
 

-----Original Message-----
From: Dee Stover <[log in to unmask]>
To: [log in to unmask]
Sent: Mon, 6 Apr 2009 2:58 pm
Subject: [TN] when do vias require a thermal relief


Where in IPC does it specify when a via connected to a plane must have thermal relief as opposed to direct connect? 
 

I would think it would have more to do with the assembly process than 
the fabrication process.  For instance - wave, dip or drag soldering. 
 

You input is appreciated. 
 

Thanks, 
 

:-) Dee Stover  [log in to unmask]    x8489 

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