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Subject:
From:
"Whittaker, Dewey (EHCOE)" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Whittaker, Dewey (EHCOE)
Date:
Thu, 16 Apr 2009 14:10:35 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (251 lines)
There are three types of vias defined in IPC-4761 that are part of a
protection strategy. There is a filled and covered via (Type VI-b Via);
a filled and capped via (Type VII Via); and a tented and covered via 
(Type II-b Via).
The covering of Type VI-b and Type II-b Vias shall be per the
application of SMOBC LPI solder mask per IPC-SM-840 in accordance with
the requirements of 3.7 of IPC-6012. The Type VII Via may or may not be
covered. It is dependent on final surface finish and functional
implications (via in pad).

Dewey


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Chris Mahanna
Sent: Tuesday, April 14, 2009 8:15 AM
To: [log in to unmask]
Subject: Re: [TN] Info on LPI tenting of vias, both sides

Kevin,

No big deal-  Just making sure that we are on the same page.
IPC-4761 is a laundry list circa 2007, not preferred, not necessarily
common.  Consensus at the time was scarce, not much better today.
IPC-6012 still has no explicit via protection requirements.  We might
get bare copper to explicitly apply to the vias in 6012C, but I doubt
it.  The majority of industry, including class 3, still seems to be very
much split.
That said, via protection is a real world everyday risk.  Our most
common flavor: single sided plug -> trapped nickel pretreat ->
circumferential isolated thin hole wall copper -> z axis differential
CTE during soldering = barrel cracks as infants.   It is a horrible
defect as it usually very random (at least thin Cu or poor
tensile/elongation is easy to find).  Any other etching/corrosive/ionic
material trapped in the via can yield similar, or other bad results.
A breached double sided plug/tent will certainly trap better, if the bad
guys get in.  Keep in mind the relative count of opportunities
(percentage of tent failures is usually low).  But 'cosmetically' those
tent failures can be a little too obvious.  Mask isn't fond of -65/125
shock, but hey vias aren't either.

More common hi-rel choices:
Double plug + cover
ENIG/ENEPIG first then mask
HASL first then mask (requires mask over meltable metal waiver)
Fill
Fill and cap

As far as I know, the jury is still out on ImAg, ImSn as final via
finish.  Considering creep, tarnish, whiskers, porosity... I wouldn't go
there.

Chris

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kevin Glidden
Sent: Monday, April 13, 2009 2:32 PM
To: [log in to unmask]
Subject: Re: [TN] Info on LPI tenting of vias, both sides

It is for via protection.  We have documented failures of assemblies
where
UR conformal coating pin holes and/or break-down allowed moisture
ingress to
a via and resulted in corrosion and ultimately shorting of an inner
layer to
an adjacent non-functional pad.

Kevin


-----Original Message-----
From: Whittaker, Dewey (EHCOE) [mailto:[log in to unmask]]
Sent: Monday, April 13, 2009 1:56 PM
To: TechNet E-Mail Forum; Kevin Glidden
Subject: RE: [TN] Info on LPI tenting of vias, both sides

You must first decide if this is a functional requirement, such as part
of a
via protection strategy or simply a manufacturing aid, then we can talk.
Dewey

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kevin Glidden
Sent: Monday, April 13, 2009 10:45 AM
To: [log in to unmask]
Subject: Re: [TN] Info on LPI tenting of vias, both sides

Yes, it was my mistake.  I intended to say dry-film tenting of vias on
both
sides.

I have IPC-4761, and it basically covers an LPI tented via as Type I.
What
is not clear is if by inclusion in the specification that this is a
preferred format or not, or was simply included because it is common
practice, right or wrong.  In section 3.2 there is also a statement
"Plugging of vias from both sides of the hole results in
manufacturability
and reliability issues".

I have heard warnings that tenting both sides can be problematic in that
if
the seal is not perfect or somehow compromised (adhesion loss /
puncture)
moisture or other contaminants can make their way in and the results can
be
more catastrophic then a blind or single-side-tented via. I have also
been
warned that at one time LPI tenting was "verboten" in MIL-STD-2000, so
that
alone is questionable whether it was a scientifically derived
requirement,
as some of the old requirements did not have the benefit of today's
research.

Thanks,
Kevin



-----Original Message-----
From: Chris Mahanna [mailto:[log in to unmask]]
Sent: Monday, April 13, 2009 1:25 PM
To: TechNet E-Mail Forum; Kevin Glidden
Subject: RE: [TN] Info on LPI tenting of vias, both sides

Kevin,

Generally LPI and Tent don't go in the same sentence unless there is a
secondary cover.
Is your intent via protection?  Does your solderable final finish
process
follow the mask?

Chris


Chris Mahanna
Robisan Laboratory Inc.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kevin Glidden
Sent: Monday, April 13, 2009 12:45 PM
To: [log in to unmask]
Subject: [TN] Info on LPI tenting of vias, both sides

Hello everyone,

I am looking for information on the potential pitfalls of using LPI via
tenting on both sides, leaving an air pocket in the vias.  Application
is
NOT Pb-Free.

I located this article description, and wanted to see if anyone had it,
but
other information, inputs, or articles are also welcome:


Title: An Evaluation of Via Hole Tenting with Solder Mask Designed to
Pass
MIL-P-55110D Thermal Shock Requirements


Author(s): J.J. Davignon, F. Gray


Journal:  <http://www.emeraldinsight.com/0305-6120.htm> Circuit World


Thanks!


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