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January 2009

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Subject:
From:
Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Joyce Koo <[log in to unmask]>
Date:
Thu, 29 Jan 2009 04:47:56 -0500
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Based on the established reliability results years ago.  
--------------------------
Sent using BlackBerry


----- Original Message -----
From: TechNet <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Sent: Thu Jan 29 02:40:54 2009
Subject: [TN] NiAu plating on tab pad


Hello Techneters,

I want to know why do we have to do e'lytic Ni/Au plating on tab pad of memory module PCBs.
I mean why specified surface finish and why specified 'gold' thickness.
(mostly specified by set makers. Industry standards like IPC and JEDEC seems to just recommends.) 

If Ni/Au plating with reduced thickness or other finishes can meet mechanical/reliability requirement in their socketing application,
isn't it okay to use?

Is there any siginificant reason in using e'lytic Ni/Au plating with specified thickness??

Thanks for the kind answer in advance.
Good day!

jc

Korea Circuit R&D

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