Hi Rudolph,
Yes that's what I'm trying to say. A Cpk of 1.66 is actually 5 sigma,
which if measured for Cp is actually 10 std deviations, since you're
measuring for both LSL and USL. If your customer wants to have a
6-sigma, for a Cp calculation it will need to measure across 12 std
deviations. For Cpk, you need to find the minimum of either the lower
or the upper limits, in the solder paste printing height, will be the
upper.
As Richard mentioned, applying a kapton tape to mask off no-loads
would add to the thickness. There are also other factors, such as if
your foil is filmsy, ie. not fully stretched, or if you're using a
carrier for your PCB, or even if the stencil height is not properly
adjusted, ie. too close to the PCB, causing the stencil to "bow",
hence a larger gap in the center of the PCB than the edges.
In all cases, the paste deposit will be thicker than the thickness of
the foil. However, an average of additional 1 mil might be too large.
Our vendor has an average of about 5.5 - 5.6 mils for a 5-mil foil to
account for these factors. This is probably why it is hard to get the
Cpk to 1.66, since your mean is not exactly the midpoint of your USL
and LSL, which is 5 mils. The constant "K" is calculated to offset the
difference between your midpoint (5 mils) and your mean (6 mils) to
derive to a lower Cpk.
Hope this helps.
Andy
Quoting Rudolph yu <[log in to unmask]>:
> Andy:
>
> Check out the website. Actually Cpk 1.66 = 5 sigma, cpk 1.33 is = 4
> sigma. One will need a cpk of 2 in order to get to the 6 sigma
> region.
> The averge is about .15mm which is around 6 mil. This is another
> thing that our process engineer cannot answer me directly why the
> solder paste dispoisition is 1 mil more than the the stencil
> thickness on average? Any help?
>
> http://www.isixsigma.com/library/content/sigma_cpk_conversion_table.asp
>
> I dont know what the sample size the software is using. I am still
> waiting for the answer from the SPI manufactuer.
>
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