Hi Technetees:
 
One of our customers had asked us to show that our solder paste despoisition process is capable to acheive Cpk at 1.66 (6 sigma).  We just built a thousands of pilot boards, and the SPC report I got from the TRI's SPI machine indicated that the process is able to reach that goal.......however the software sets the upper limit and lower limits for height, area and volumn to about +/-50%.  Is this reasonable to have such a high variance in the printing process? (We use 5 mil stencil with 0201 and fine picthc aperature).  If I change the limits to +/- 25%, the Cpk will become around 1.33 ( 4 sigma)...should I claims that we can acheive 1.66, and point out that the  wide tolerence was set by the machine expert, or should I limit the tolerance spread, and hope that customer will accept lower Cpk.  
 
 
I guess my quesiton is " Is +/- 50% tolerance a resonable limits for paste printing process?"
 
 
 
BTW the AOI and AXI yield is in the high 98 and low 99 range for this design. 
 
Thanks
Rudolph 
 

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