Looking at that stack, I'd put the diff pairs on one of the following
layers:
1,3,12 or 14
This way you'd always have a solid plane as a reference.
My $.02.
Jason Roetz, CID+
Master Designer
Eaton Corporation
Electrical Group, Industrial Controls Division
4201 North 27th Street
Milwaukee, WI. 53216
Telephone: 414-449-6397
Fax: 414-449-7319
[log in to unmask]
www.eaton.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of David Baldwin
Sent: Monday, November 24, 2008 3:40 PM
To: [log in to unmask]
Subject: Re: [TN] Stripline Traces and Plane Splits
Shawn:
It's a 14 Layer board as it has a lot of critical voltages that need to
be planes. If I had a plane for each voltage, I'd need a 24 layer
board! I'm only using the surface layers and L3 & L12 for routing.
1 - Primary
2 - DGND
3 - Trace
4 - Split DGND
5 - Split DVCC
6 - Split AVCC
7 - AGND
8 - Split AVCC
9 - DVCC
10 - DGND
11 - Split DVCC
12 - Trace
13 - DGND
14 - Secondary
I'm not sure what the signal speeds are, I'll need to check with the
engineer. I worked with an engineer in the past who said that it's not
real detrimental when you have a solid plane on one of the sides. It's
not ideal or desirable, but you still will achieve acceptable results.
This was based upon his real world results.
Thanks,
Dave
At 11:32 AM 11/24/2008, you wrote:
>What is the plane stackup, and speed of the signals, if I may ask?
>
>I would "no", don't do this. Add a goundplane, as stripline is
>supposed to be sandwiched between two ground planes.
>
>Hard to explain over email. You see, any signal above another plane
>(ground or not) will induce a current in that plane (assuming we're not
>talking DC here). A differential signal may be thought of as two
>single ended signals. Each one will induce a return current in said
>plane; I guess you could think of it in terms of parallel plate
>capacitors. The current simply is there. The only difference for a
>differential signal is that two return currents are generated, equal
>and opposite (unless if there is an unbalance) -- but they still exist!
>There just isn't a net current, but there is a local current, right
next to each trace.
>
>If the signal speed is low, and the split power plane has ac coupling
>capacitors bridging the plane *right above your signal*, with an SRF
>above the max frequency in your differential signal and enough
>capacitive reactance to look like say an ohm below oh 100kHz, then it
>might work ok. But you may be troubled by cross currents on the power
>supply itself (unlikely, but it depends upon your noise margins). And
>you may have some discontinuity in the signal from jumping that gap.
>And you're counting on the AC bypass capacitors AC coupling your ground
>plane to you split power planes in a very big way--they would need to
>exist very close to anywhere your signal changes planes or goes into a
>connector.
>
>You have to define how good it must be. And then, if you're allowed to
>go back and redesign if it doesn't work first time.
>
>Shawn Upton, KB1CKT
>Test Engineer
>Allegro MicroSystems, Inc
>[log in to unmask]
>603.626.2429/fax: 603.641.5336
>
>-----Original Message-----
>From: TechNet [mailto:[log in to unmask]] On Behalf Of David Baldwin
>Sent: Monday, November 24, 2008 9:36 AM
>To: [log in to unmask]
>Subject: [TN] Stripline Traces and Plane Splits
>
>Fellow Designers:
>
>I am designing a board with differential pairing in a stripline
>configuration. One the bottom side is a solid ground plane. On the
>top side is a split power plane.
>
>I was told that running traces across the splits is not a significant
>problem as there is a solid ground plane on the other side for the
>return currents to flow.
>
>Do you agree with this assessment and what has your personal experience
>told you.
>
>Thanks in advance for your opinions and response.
>
>David Baldwin CID+
>
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