doesn't sound like he needs it overplated -- just filled to prevent
soldering problems.
At 05:32 PM 10/16/2008, Chezhian, Krishnan (Radhakrishnan) wrote:
>Hi Dave,
>
>This sounds like a VIPPO (Via In Pad Plated Over)Technology & we do this
>a lot for various customers. Yon need to plate the hole, fill it with
>epoxy & plate once again to cap the vias to form a pad, so the surface
>will be practically flat within +/-2.0mils....
>
>
>
>
>Thanks & Best Regards,
>
>Krishnan C
>
>Director Of Quality
>
>
>
>Sanmina-SCI Corporation (M) Sdn. Bhd.
>
>Sama Jaya Free Industrial Zone
>
>93450 Kuching, Sarawak, Malaysia.
>
>Tel: 60 82 363 000 Ext 1602
>
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>"It is easier to do a job right than to explain why you didn't."
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>
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>
>-----Original Message-----
>From: TechNet [mailto:[log in to unmask]] On Behalf Of Dave Connitt
>Sent: Thursday, October 16, 2008 10:35 PM
>To: [log in to unmask]
>Subject: Re: [TN] Problems with plating vias closed
>
>Hi Pete,
>This is a research/development project. The vias are currently tented,
>plus some are under a couple of 100 pin QFP's. I would have to move the
>vias out from under the FPGA's or risk solder balls once I untented
>them. Since this is a development project, I doubt they will spin the
>board again unless there is some other issue. We rarely wave solder
>boards anymore as there are very few thru hole parts on them anymore.
>The wave was a great way to fill vias with solder. Ah, the good old
>days..
>Dave Connitt CID+
>Printed Circuit Designer
>KDI Precision Products, Inc.
>A Wholly Owned Subsidiary of:
>L3 Communications
>3975 McMann Road
>Cincinnati, Ohio 45245
>Ph. 513- 943-2010 Fax 513-943-2288
>
>
>-----Original Message-----
>From: Pete Houwen [mailto:[log in to unmask]]
>Sent: Thursday, October 16, 2008 9:36 AM
>To: [log in to unmask]; Connitt, Dave @ KDI
>Subject: Re: Problems with plating vias closed
>
>Is this just a matter of closing the holes? Rather than having your PCB
>supplier try to plate the holes full, can you let them (partially) fill
>during soldering?
>
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