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August 2008

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Subject:
From:
Kevin Glidden <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Kevin Glidden <[log in to unmask]>
Date:
Thu, 7 Aug 2008 13:42:33 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (113 lines)
Hello everyone,

This issue is still on-going, and I was hoping I could request some
additional assistance.

I received X-rays back and it shows some voiding at the center pad.  At
first I thought they might be in the part or die of the LED as it appears to
be somewhat of a pattern, but the oblique angle shot shows otherwise. Steve
- can you post this for me?

Background info:

Current Process:
Sn63Pb37 Alloy
OA flux
Stencil 1:1 to pad (I need to modify with center pad reduction) and 6 mil
stencil.  (I also need to reduce stencil thickness, first runs show solder
balling)
Convection reflow.  Peak temp is 213-216C, time above 183 1:06-1:08.

PCB: 
5 layer, Thermagon laminate with .032 cu-core (layer 3) and 2 oz cu layers
(1,2,4,5).  Total thickness .080"+.005"/-.010".  2.420" dia round.
(Thermagon CTE ~ 81ppm XY Axis > Tg (105C) and 171 ppm Z-Axis > Tg (105C))
Immersion Silver finish, 5 to 12 u-in

Pad Info:
2X outer pads are 6.46mm x .70mm.
1X center pad is 6.46mm x 5.6mm
Space between outer pads in center pad is 1.2mm.
These are not mask defined pads.
No via in pad.

I am looking for:

1) Recommendations on how to reduce / eliminate the voiding and 
2) Information on how to determine optimum solder joint thickness (articles,
papers, etc?).  My next step is to get x-sections and/or SEM to determine
joint thickness.

Thanks in advance,


Kevin Glidden
Manufacturing Engineer
Luminescent Systems Inc.
4 Lucent Drives
Lebanon, NH 03766
(603) 643-7766 x3152
 
-----Original Message-----
From: Guy Ramsey [mailto:[log in to unmask]] 
Sent: Tuesday, July 15, 2008 11:30 AM
To: 'TechNet E-Mail Forum'; 'Kevin Glidden'
Subject: RE: [TN] Inspection of bottom only terminations / process
verification

Solderable surface + solder & Flux + proper TTP (time temperature profile) =
good solder connection. 

I would evaluate this the same way you do an MLF or LGA. If the process
results look good on the rest of the board and you know the BOT part is
solderable you are golden. X-ray for voids as a verification as you would a
BGA or a D-PAK.  

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kevin Glidden
Sent: Tuesday, July 15, 2008 8:20 AM
To: [log in to unmask]
Subject: [TN] Inspection of bottom only terminations / process verification

Hello Netters.

Looking for some advice on how to handle a new bottom only termination
device we have.  We don't normally run devices with bottom only
terminations, so the inspection has not been an issue, until now.  Any
recommendations on how to inspect these, or verify the process is working?
I am thinking I might process some samples and send them to a lab for
x-sections (we do not have x-section capability here).  Is that sufficient?

Thanks in advance!

Kevin Glidden

Manufacturing Engineer

Luminescent Systems Inc.


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