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August 2008

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Subject:
Re: Via hole fill
From:
Grunde Gjertsen <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Thu, 21 Aug 2008 15:36:34 +0200
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Hi

Yes that's true but it's very design related and has been balanced to some 
extent by better laminates and solder processes. 
There is some serious downsides in having too much surface copper so I'd 
be careful about specifying more than IPC Class 3, the dilemma is simpler 
boards you can have more copper but don't need it, complex boards you want 
more copper but can't have it without causing other problems.


Grunde









Werner Engelmaier /* <[log in to unmask]> 
Sent by: TechNet <[log in to unmask]>
21.08.2008 14:17
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Subject
Re: [TN] Via hole fill






Hi Grunde & All,
Please remember that 6012B was written prior to RoHS and the plating 
thicknesses given in Table 3-2 are already too thin for some SnPb-PCBs, 
and inadequate 
for most Pb-free PCBs..

Werner
Future workshops:
Reliability Issues with Lead-Free Soldering Processes, September 22, 
Schaumburg
Failure Mode and Root Cause Analyses Reliability (Fatigue, Brittle 
Fracture, 
ENIG), September 22, Schaumburg
Solder Joint Reliability: Parts 1 & 4, Oct. 9, Moscow, Russia
Solder Joint Reliability: Part 4, Oct. 17, Timisoara, Rumania
Solder Joint Reliability: Parts 1 & 4, Oct. 22, Tallinn, Estonia



**************
It's only a deal if it's where you want to go. Find your travel 
deal here.
 
(http://information.travel.aol.com/deals?ncid=aoltrv00050000000047)

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