Thanks for the elaboration, Paul.
It sounds like these would be good papers to read. With what you have said,
I believe I sat in on a summary of such an effort presented by Mike on this to
pic a year or so ago. I will ping him but it might also be worth while to
see if Steve could put them up for the more shy members of the forum.
Thanks again and best wishes,
Joe
In a message dated 7/31/2008 12:42:09 P.M. Pacific Daylight Time,
[log in to unmask] writes:
Hi Joe,
Predicated with the disclaimer "As I understand it" ... what Mike and Jason
did was test IST coupons at three temperatures for example 150°C, 160°C and
170°C and establish a curve of cycles to failure plotted against temperature.
A curve of cycles to failure at test temperatures was calculated using
formulas and methods outlined in the articles. They then calculated the thermal
cycles to failure at a lower operating temperature. By performing an accelerated
test at high temperature one can estimate the mean cycles to failure at a
lower temp. If you know how many thermal cycle the product will see a day;
let's say, for example, a computer is turned on in the morning and off at
night, giving one cycle a day, you can then extrapolate field life in days, weeks,
fortnights etc.
This is a very simplified overview of acceleration testing. I suggest you
read the articles.
We have had good results with customers that have used this method to
determine whether to use or reject suspect PCBs. In one case it was decided to
accept the risk on a "PWB lot of concern" and the field data confirmed the
theoretical projection of MTBF.
This method works with simple, well understood, failure modes like metal
fatigue. If there are confounding factors like variable copper plating and
interconnect separation present in the product, this method is less effective.
Once you have good reliable product, acceleration testing to determine field
life is the next logical reliability test.
Jason Furlong here at PWB or Mike Freda at Sun can better address this
protocol, its applications and uses.
PWB failure modes of concern include, two types of barrel cracks, two types
of interconnect failures, two types of corner cracks, design specific
interconnect failures like microvia to target pad cracks, or butt joint failure in
sequentially laminated blind capped vias and now, with the advent of lead-free
assembly, material degradation expressed as delamination or crazing, to name
a few.
Lead free assembly and rework routinely reduces reliability by 50% on well
made PWBs.
The reasons for failure are as varied as the designs, builds, and
fabricators used in the industry. Custom PWBs frequently have custom root causes for
failure.
Paul Reid
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joe Fjelstad
Sent: Thursday, July 31, 2008 12:36 PM
To: [log in to unmask]
Subject: Re: [TN] Use of QFN devices in high reliability applications
Hi Paul
Can you elaborate? What is failing and why? What is then the failure rate
for lead-free? The same? Lower? Higher? ... I guess I should read the papers
;-)
I am interested in getting copies if you have a spare set... :-)
Maybe Steve would be so kind as to consent to post them to save you a lot
of bother should many others have similar interest
Thanks in advance,
Joe
In a message dated 7/31/2008 6:29:39 A.M. Pacific Daylight Time,
[log in to unmask] writes:
My sense is that 30% of the reliability failures, in a tin-lead
application, are due to PCB failures.
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