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June 2008

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Subject:
From:
"Gumpert, Ben" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Gumpert, Ben
Date:
Thu, 5 Jun 2008 15:19:17 -0400
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Werner,

As long as the solder bump is big enough to reach the pad when the chip
is resting on the solder mask. Otherwise there may be some unsoldered
joints.

But what about for use with underfill? Does a deeper pocket (from a
thicker solder mask) make it more likely that voids will develop,
particularly if there is a narrower space between the chip and solder
mask, which will help the underfill to wick more quickly?

Ben 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Werner Engelmaier /*
Sent: Thursday, June 05, 2008 9:17 AM
To: [log in to unmask]
Subject: Re: [TN] Chip on Board and Solder Mask

Hi Ben,
The solder mask will automatically be thinner then the resulting joint
height, because the CTE of the solder mask is greater than the CTE of
the solder, and therefore wil shrink more on cooling from soldering
temperatures. 
Having a soldermask under the component is agood thing, because it will
increase the resulting joint height thereby increasing reliability.

Werner
Future workshops:
Reliability Issues with Lead-Free Soldering Processes, June 17, London
Interconnect Failures and Design for Reliability for PCB PTHs, June 17,
London Solder Joint Reliability: Parts 1 through 4, July 17/18, Thal,
Switzerland Pb-Free Soldering Processes-Survival, Quality, Reliability,
August 18, Orlando Reliability Issues with Lead-Free Soldering
Processes, September 22, Schaumburg Failure Mode and Root Cause Analyses
Reliability (Fatigue, Brittle Fracture, ENIG), September 22, Schaumburg



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