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June 2008

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Subject:
From:
Phil Nutting <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Phil Nutting <[log in to unmask]>
Date:
Wed, 4 Jun 2008 12:33:49 -0400
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As we do more SMT boards with high power or high voltage we have seen some failures we suspect are due to flux and other undesirable junk under some SMT devices.  In researching cleaning processes (and failures) I have seen some articles that show "our fault mode".  One solution seen in this research suggests removing solder mask under SMT components to give a larger space under the parts to allow the junk to be more easily removed during the cleaning process.

Is this an industry problem and is removing the silkscreen under the devices an industry solution?  If removing the silkscreen is what folks are doing, what are the decision criteria being used as to which components get this treatment?  Is it every component or just those that have the highest likelihood of failure due to the current through or voltage across the part?

Thanks in advance.

Phil Nutting

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