The main concern with increased level of voiding is not necessarily the
reliability or thermal impact it’s the increasing stand off that can occur.
As the voiding increases for a given application floating increases
increasing the possibility of opens.

In a x-ray book available from IPC I suggested with Dave Bernard a level of
25-30% was OK but depends how you measure it. In a line running in Sweden
with a selection of pastes we had less than 20% more like 15%.

I have a plan to do a little wok on voiding and the package height when I
get some time to play again. The guys at IPC have the following links on the
APEX web site but they may be of interest to people. We used them last week
in a SMART Group workshop in the UK.

See component floating during reflow
www.bobwillis.co.uk/lgaworkshop/lga01.wmv   

Voiding in solder joints due to via design
www.bobwillis.co.uk/lgaworkshop/lga02.jpg   

Poor solderability and how to test parts in assembly
www.bobwillis.co.uk/lgaworkshop/lga03.jpg 

Printing paste during LGA rework, one option
www.bobwillis.co.uk/lgaworkshop/lga04.jpg 

Printing 0.004” paste on LGA components
www.bobwillis.co.uk/lgaworkshop/lga05.jpg  

Rework of LGA packages on flexible circuits
www.bobwillis.co.uk/lgaworkshop/lga04.wmv   

Bob Willis
2 Fourth Ave, Chelmsford, Essex, CM1 4HA England
Tel: (44) 1245 351502
Fax: (44) 1245 496123
Mobile: 07860 775858
 
www.ASKbobwillis.com
 
Book your place on Bob's "Step by Step Failure Analysis Workshop" 14th
May www.ASKbobwillis.com/faworkshops.pdf
 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Victor Hernandez
Sent: 05 March 2008 13:50
To: [log in to unmask]
Subject: [TN] QFN Thermal Plane Voiding

Fellow TechNetters:

The 25% solder voiding has been an accepted rule of thumb for QFN, Quad
Flat w/No Leads, IPC-A-610D sec. 8.2.13.   Is there any other guideline
out there.

Victor,



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