TECHNET Archives

March 2008

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Tue, 18 Mar 2008 10:32:21 -0500
Content-Type:
text/plain
Parts/Attachments:
text/plain (276 lines)
I thought the topic was stressors on the sj causing a crack, assuming
the pad is anchored to the PWB.
But Wayne, you are absolutely correct that pad adhesion becomes a big
factor as the pad diameter is reduced, and I can tell you that below
.022" diameter the pad separation becomes a significantly greater issue,
but I do not know why. I can only assume that as the pad diameter gets
smaller there is proportionatly less pad adhesion, especially during
reflow. So if you are dealing with pad diameters less than .022", then a
SMD pad may work better, because as Werner pointed out, when they get
that small the stressors are redundant.
I should note that there are particular circuit board substrate
materials that have proven to be a problem in the industry in that the
copper pads do not bond as well to them as others. So much so that I
have seen the pads float up off of the board into the BGA solder joints
during standard reflow. You should see this in an X-Ray; a whole bunch
of solder balls with a single straight side, no order to which side the
straight side is. It is quite a sight. I hope none of you ever see it on
your hardware.

And as far as mask registration, every board house has its bad days. I
have yet to see a pwb house provide SMD masking registration dead on,
day in and day out. It is an issue.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Thayer, Wayne
Sent: Tuesday, March 18, 2008 10:03 AM
To: [log in to unmask]
Subject: Re: [TN] Solder Mask Defined Pad BGA Reliability

Hi Richard!
 
I knew my comments would stir things up!
 
I was talking about the weak link being the pad adhesion to the
underlying laminate, not solder to the pad.
 
On the studies you did of mask defined vs. non-mask defined, I
understand that on your pcb, you varied this parameter.  But what about
the pad on the BGA itself?  As I stated previously, I have yet to see
anything other than mask defined pads.  If that's the case, perhaps your
problems with mask defined pads have all been due to a poor masking
process which left contamination and tapered crack-initiating residue
around the edges of the pads.
 
I have huge problems, especially with 0.5mm pitch devices, with non-mask
defined pads because the board fabs typically over-etch the pads.  Sure,
the mask on a mask defined pad can be poorly done too, but at least I
have something left to solder to.  Unfortunately, I am forced into this
condition for extremely high density designs--I have to route between
the rows of the 0.5mm pitch BGA anyway, so the question becomes
moot--the pad and mask have to be just about perfect.
 
Wayne

________________________________

From: TechNet on behalf of Stadem, Richard D.
Sent: Tue 3/18/2008 10:29 AM
To: [log in to unmask]
Subject: Re: [TN] Solder Mask Defined Pad BGA Reliability



I hate to disagree with you, Wayne.
Soldermask-defined pads typically have the soldermask up on the pads.
Therefore they reduce the amount of pad area for the solder to form a
good IMF because the design seldom allows for a larger pad surface area
to compensate for the maskant reduction. They also preclude solder
wetting down around the sides of the pads. Having solder totally cover
the pads including the sides provides a much stronger (mechanically)
solder joint. I do know that on boards with soldermask on top of the
pads, there is often a very thin layer of the maskant over the whole
pad. I have yet to see that happen with non-soldermask-defined pads.
The stresses during cycling are concentrated around the area where the
soldermask comes in contact with the solder joint. I have seen the same
boards with and without soldermask defined pads temperature cycled and
the soldermask-defined boards had daisy-chain failures as much as 50%
fewer cycles than non-soldermask defined pads. Same was true of BGAs
with soldermask-defined pads versus non.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Igoshev, Vladimir
Sent: Tuesday, March 18, 2008 8:18 AM
To: [log in to unmask]
Subject: Re: [TN] Solder Mask Defined Pad BGA Reliability

There is a very short answer: Fracture Mechanics :-)

When we have an SMD pad, there is an unavoidable stress concentration in
the vicinity of the triple junction "solder/solder pad/solder mask".

Non-SMD pads are free from that kind of stress concentration, as they
are "wrapped up" with solder.

Regards,

Vladimir

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kirk, Graham (GE
EntSol, Intelligent Platforms)
Sent: Tuesday, March 18, 2008 8:06 AM
To: [log in to unmask]
Subject: Re: [TN] Solder Mask Defined Pad BGA Reliability

Hi Joyce,

I realize that CTE mismatch is responsible for the fatigue, I am trying
to understand why the solder mask has so much effect on the solder
joint.

Graham Kirk

Senior Technologist

Radstone Embedded Computing

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joyce Koo
Sent: 18 March 2008 11:07
To: [log in to unmask]
Subject: Re: [TN] Solder Mask Defined Pad BGA Reliability

Fatique, due to CTE mismatch or poor design.  My 1st guess.
Jk
--------------------------
Sent using BlackBerry


----- Original Message -----
From: TechNet <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Sent: Tue Mar 18 06:18:08 2008
Subject: [TN] Solder Mask Defined Pad BGA Reliability

Hi All,







Can anybody tell me what the actual mechanism is that propagates cracks
in the device to ball joint on plastic BGA's (Leaded balls) with SMD
pads under thermal cycling?







Graham Kirk



Senior Technologist



GE Fanuc Intelligent Platforms Ltd




---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing
per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at:
http://listserv.ipc.org/archives
Please visit IPC web site
http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
ext.2815
-----------------------------------------------------

---------------------------------------------------------------------
This transmission (including any attachments) may contain confidential
information, privileged material (including material protected by the
solicitor-client or other applicable privileges), or constitute
non-public information. Any use of this information by anyone other than
the intended recipient is prohibited. If you have received this
transmission in error, please immediately reply to the sender and delete
this information from your system. Use, dissemination, distribution, or
reproduction of this transmission by unintended recipients is not
authorized and may be unlawful.

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing
per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at:
http://listserv.ipc.org/archives
Please visit IPC web site
http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
ext.2815
-----------------------------------------------------

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing
per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at:
http://listserv.ipc.org/archives
Please visit IPC web site
http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
ext.2815
-----------------------------------------------------

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for
additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for
additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------



---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for
additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------

ATOM RSS1 RSS2