A good EMS performs ion chromatography once per week as a process
control for both the ROSE test and the wash process. It does not matter
whose board they use for a sample, but it should be a random sample so
as to eventually catch any assemblies where the ROSE test
(Ionograph/Omegameter) is passing assemblies with high levels of
entrapped flux that do not register in the test because not enough is
diluted out from under components or is otherwise trapped. If done
correctly, the ion chromatography will wash the trapped fluxes out, and
you will get a true reading of just how well the wash process is
working. The weekly test is then absorbed as a benefit for all programs
going through the EMS. This was one of the major marketing features of a
prominent EMS I once worked for, and it also provided us a lot of good
information on just how well the wash and ROSE tests were. The military
customers really liked the way it was done, it gave them a good feeling
for just how good the wash process was really working.
I recall several times where we found assemblies that passed ROSE, but
"failed" Ichrome. We came up with different wash processes and/or
different methods of soldering to ensure they were clean. A couple of
examples were round military-style potted connectors or connector
harness subassemblies that are mounted flush to the PWB and wave
soldered. The flux is sprayed or foamed up through the holes, then the
pins were soldered, trapping the flux under the connector. These
connectors actually had a gasket to keep water out from under the
connector, and they worked really well for keeping the wash solution out
and the flux inside as well. However, enough was detected when
performing Ichrome to discover a problem before it really became a
problem, and the design and the process were changed to ensure no flux
was entrapped. Same with metal can through-hole relays that sit flush to
the board. Many other situations exist out there as well.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Graham Collins
Sent: Monday, January 07, 2008 7:51 AM
To: [log in to unmask]
Subject: Re: [TN] specifying board cleanliness
Hi Phil
My reply concerned boards that have been washed. For "no clean" boards
the acceptability would have to be different, but I'm not sure how best
to define it. You can define maximum residues (e.g. "maximum chloride
residue level of xx.xx micrograms per square centimeter" as Doug has
suggested) - but even so how much control do you have? Realistically, a
CM isn't going to do ion chromatography every day given the cost and
time requirements (unless you tell them they have to, and you will pay
dearly for it). And if they do, will it be on a reworked board? How
will you be sure it's representative, given that each rework operator
will use different amount of flux. This is why the idea of no-clean in
high reliability gives me the heebe-jeebies...
regards,
- Graham
-----Original Message-----
From: Phil Nutting [mailto:[log in to unmask]]
Sent: Thursday, January 03, 2008 2:05 PM
To: TechNet E-Mail Forum; Graham Collins
Subject: RE: [TN] specifying board cleanliness
Graham,
OK, so lets say a board has been built using no-clean. Does that have a
different "acceptable standard of cleanliness" or is it exempt?
I'm going to assume, for now, that your specification listed below is
for boards that have been washed.
Thanks, this is great info.
Phil
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Graham Collins
Sent: Thursday, January 03, 2008 10:10 AM
To: [log in to unmask]
Subject: Re: [TN] specifying board cleanliness
Happy New Year Phil!
Well, "it depends"...
First question is how clean do you need them to be? Depends on the
application and environment. Second question is what sort of assembly
process the CM is using - if "no clean" then they will be justifiably
opposed to cleanliness testing.
The generic callout that we most commonly see on drawings is "clean per
J-STD-001 C-22" - which translates into clean the assembly, both sides,
and then do an ionic contamination test with a upper limit of 1.56
micrograms / cm2 NaCl equivalent contamination. I'm not sure why
J-STD-001 gives an option to only clean one side - never seen that
process in use. Anyway, a starting point...
regards,
Graham Collins
Halifax Production Engineering
L-3 communications Electronic Systems
(902) 873-2000 ext. 6215
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Phil Nutting
Sent: Thursday, January 03, 2008 10:45 AM
To: [log in to unmask]
Subject: [TN] specifying board cleanliness
Good Morning and Happy New Year to All,
Let me start by confessing my ignorance relative to cleanliness of
circuit boards. We have no idea what numbers to specify that fit into
the IPC testing methods for board cleanliness. If I tell my CMs to make
the boards clean, it would be good to specify a target value and or test
method.
Can someone give me some guidance on how to chose these specifications?
What are worth while tests and which ones are window dressing?
I've read through some of the IPC tests methods and my head hurts.
Thanks in advance,
Phil Nutting
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