TECHNET Archives

January 2008

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Wed, 23 Jan 2008 11:28:37 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (85 lines)
Hi, Sue.
It depends (add one more Mountain Dew to the IOU list). Per J-STD-001
and IPC-610, greatly dispersed solder fines (reflowed and
non-agglomerated paste particles) are acceptable if attached to the
sides of pads, wedged in between the solder mask and the edge of the
pads, trapped underneath of a component, are not easily dislodged and do
not cause a violation of the minimum electrical clearance of the device
(usually defined on the PWB fabrication drawing and typically .005").
Grossly smeared solder paste is shown as an unacceptable example.

If you are getting small entrapped fines, it is usually because the
solder paste is a Type 4 or smaller particle size, rather than the more
commonly used Type 3. If you are using Type 4, special consideration
needs to be taken during design layout with the spacing between the mask
and the edges of the pads. The printing process must be at or very near
a 6 sigma level with appropriate aperture reductions to keep all of the
paste on top of the pads, even after placement.
 
Solder balls are small groupings of agglomerated fines or else they are
spattered from the larger agglomeration. They are usually seen in
situations where "belly pad" components are used, and these types of
components should have at least a 50% reduction in the stencil aperture
as a rule of thumb. Other components that have a large flat surface
soldered to larger flat areas on the board pads, such as larger chip
capacitors, power transistors, etc, are prone to producing solder balls.
This is because unlike solder paste deposits on other leaded components,
the solder has no place to flow to when it goes liquidus, and thus some
spattering takes place. So again, a good stencil aperture reduction
scheme must be used.

If the solder balls are present and are entrapped in no-clean flux, that
may be acceptable for class 2 product. But do not go purely by the
specifications, as some devices such as those intended for space,
medical, traffic control, etc. may require much more stringent
control......

Of course there are also other causes, one common one is printing solder
paste immediately after the bare PWB was washed but may still have
entrapped water within the vias. Another is contamination on the pads.
Another is microvias that literally outgas and explode through the
solder during reflow due to the entrapped contamination because the
board was not cleaned properly after ablation and prior to plating, or
after plating. Another is poor solder paste handling (moisture
absorption from being left out in fairly high humidity, or excessive
shear on the printer, or because it was continually returned to the
container and re-refrigerated (condensation). There can be lots of
causes.

So have a good time, I hope this helps.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Sue Powers-hartman
Sent: Wednesday, January 23, 2008 9:58 AM
To: [log in to unmask]
Subject: [TN] Solder fines

We are having a problem with tiny solder fines that are clinging to fine
pitch SOIC leads, not on the solder mask, that are not being washed off
in the cleaning process. Are solder fines considered the same as a
solder ball, which means they all have to be removed, or is it
acceptable to leave them alone.

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for
additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------

ATOM RSS1 RSS2