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To address the cleanliness issues of a no clean assembly or a cleaned
assembly. We have found that the total board bag extraction method has it's
limitations that force at Foresite to use the localized extraction of 0.1 in2 or
0.02 in2 area extractions to understand the amount of residue between leads or
below a low standoff component. By using these isolation techniques we are
able to determine the type and level of residues that are causing the problems
either due to stray voltage, and electrochemical migration problems and
optimize the process to minimize the residual effect. The cleanliness limits
that we at Foresite recommend are based on the need for high impendence
circuitry to work in a controlled environment but the residues can absorb moisture
over time to create these failures.
Using a no clean flux if it has not reached the activation temperature it
will still be moisture absorbing and conductive and this can be death to an
active circuit of low voltage as well as high. The no clean flux residue must
reach the activation temperature for all the flux not just one place on the
board surface. We have worked many FA investigations with selective soldering
processes leaving flux on either bottom or top side of the assembly that did
not see enough heat to create a benign residue and it will create the
conditions of the corrosion cell and cause the circuits to fail. Suggested reading
Jan 2008 issue of Circuits Assembly Mag Process Doctor "A Fresh Look at
Cleanliness" _http://circuitsassembly.com/cms/content/view/5958/95/_
(http://circuitsassembly.com/cms/content/view/5958/95/)
We also believe that the bare board, component, assembly (cleaned and not
cleaned), heat sinks, and inside surface of the housing protecting the assembly
all should have cleanliness limits. We have established these after
building our database from the thousands of failure analysis that we have performed
and working with our customers to work back to root cause and develop an
optimized qualified process then monitor it for years. Seeing these improved
performance conditions when controlling these residues limits has allowed
Foresite to establish our current cleanliness criteria and as technology changes,
design and circuit sensitivity are the driving factors for us to modify the
cleanliness limits. Using a new definition of cleanliness of a specific area
and not just a general cleanliness of the total board we believe the problems
many companies are seeing when using no clean and even those that clean can
be controlled.
How clean is clean enough isn't a total board cleanliness question anymore
but on the critical circuitry that fails first.
I hope this helps.
Terry Munson
Foresite
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