While working an a CM, other than the one I am presently with, we made
boards for a transmission line (power line) time delay reflectometer. The
end product thumped a down power line and measured the time for a reflection
to return from a break in the line. It was used to locate breaks in the line
over many miles.
So, there was this huge voltage thump and then a tiny little reflection.
No-clean flux or poor cleaning rendered the assembly useless.
So, the answer to your question is yes. But, I don't have a number. Brian's
high voltage number may be good, as are the other considerations he
mentioned.
As for the low side, if a few micro amps of leakage would present an
problem, no-clean will probably be an issue.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Phil Nutting
Sent: Thursday, October 04, 2007 11:55 AM
To: [log in to unmask]
Subject: [TN] operational sweet spot for no-clean flux
Hello Techsperts,
Is there a range in which no-clean is best NOT used? For example, very low
current circuits or high voltages greater than 110 up to 25 kV? Our primary
problem seems to be with SMT boards and from more than one vendor.
I know a lot of companies use no-clean, but for those who insist on washing
boards even those with no-clean flux, what is the reasoning?
Simply esthetics or an actual circuit related requirement?
I'm trying to determine if all our boards must be washed or if there are any
that would be a don't care.
Thanks in advance,
Phil
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