Well this is a little different sidetrack but still connected to vias and
filling... but if you are attempting to make 'thermal vias'... what is the
most reliable and economic way to accomplish it and successfully get the
heat out under a part that has a thermal 'belly' pad?
The issues I am aware of are related to the solder paste melting into the
vias at reflow ... its touchy to do because the vias if left open tend to
'steal' the solder from under the part... sometimes causing insufficient
solder in the joint.
Are fabricators and designers using a some special compound to fill the
vias? Something like loaded thermal epoxy? Is there any data on the subject
that I can read? Or someone to talk to that has some experience with the
issues?
Cost and performance are things we try to balance... especially when the
customer buys the 'must work but I don't want to pay that much' option...
:)
Bill
-----Original Message-----
From: Ted Tontis [mailto:[log in to unmask]]
Sent: Wednesday, October 03, 2007 10:37 AM
To: [log in to unmask]
Subject: Re: [TN] Via plugging with LPI soldermask...
As I understand it you can not use LPI solder resist to plug a via or insure
a via is %100 plugged. You have to you some type of filler if you require a
via to be plugged.
I have seen some of those threads regarding links between conductive epoxy
and via barrel failure. Is there any data that suggests that conductive
epoxies or fillers shouldn't be used at a specific aspect ratio? What are
the chances that the conductive epoxy is increasing hole wall pull away,
damaging the barrel? Can non-conductive fillers act as an insulator when it
comes to heat transfer within the barrel?
Ted
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Werner Engelmaier
Sent: Wednesday, October 03, 2007 11:24 AM
To: [log in to unmask]
Subject: Re: [TN] Via plugging with LPI soldermask...
There is no reason why voids in non-conductive fills in PTVs are a
problem. Kim's experience makes sense.
Werner
-----Original Message-----
From: Haynes, Kim <[log in to unmask]>
To: [log in to unmask]
Sent: Wed, Oct 3 12:12 PM
Subject: Re: [TN] Via plugging with LPI soldermask...
I hve watched this plug/tent discussion thread with interest. I design
and build boards for multi-gigabit transmission rates in a lab
environment. When I use conductive filling, I seem to have via problems
during thermal cycling device analysis. When I use a non-conductive
epoxy, I do not have the problems. I have not been able to prove this
hypothesis but I think the conductive fill has a different expansion
rate than the board and the small vias tend to crack. The
non-conductive epoxy expands at about the same rate as the boards and I
do not seem to have the same failure rates from via cracking. One of my
board fab shops is mil qual rated and they claim that the govt
inspectors do not even want conductive epoxy in the buildings. It makes
them nervous because it could be used instead of the non-conductive
filler and they do not want any boards with silver epoxy. I have been
searching to see if anyone has done controlled tests of conductive epoxy
versus non-conductive epoxy fills for via in pad technology.
Thanks,
Kim Haynes
Interface and Clock Products
High-Speed Serial Link Applications
Texas Instruments, Inc.
214-567-2057 Telephone
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ted Tontis
Sent: Wednesday, October 03, 2007 10:20 AM
To: [log in to unmask]
Subject: Re: [TN] Via plugging with LPI soldermask...
Bill,
I used to specify in my manufacturing notes 'vias must be
plugged using LPI solder resist' I was told more then one once and from
different suppliers that they could not guarantee the vias would be 100%
'plugged'
using LPI. They would however guarantee that there would be LPI in the
via hole or that the LPI would tent over the via, leaving a void in the
center.
If I required 100% via fill I would have to require that they fill the
holes with some type of conductive filler.
Thank you,
Ted T
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Brooks,Bill
Sent: Tuesday, October 02, 2007 3:44 PM
To: [log in to unmask]
Subject: [TN] Via plugging with LPI soldermask...
Just a quick question...
When specifying 'plugged' vias using LPI soldermask... what is the
actual process used to accomplish this procedure? How do you make sure
the vias are plugged and what is the proper acceptance criteria used to
verify and inspect the finished results? What is an acceptable plugged
via vs. a reject? Is there a spec or standard that spells this out
process and inspection criteria and method for reference?
Thanks in advance...
Bill
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