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Subject:
From:
Ralph Rottnick <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Fri, 13 Jul 2007 14:20:31 +0200
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Leland,

Talking about multilayer boards, have you checked the Cu balance within the inner layers? This also has an influence conserving thermal stress in the board especially during reflow. Make sure that the cooling time after reflow is not too short.
Another thing, are these boards singulated or in an array during assembly?

Ralph

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Leland Woodall
Sent: Friday, July 13, 2007 1:59 PM
To: [log in to unmask]
Subject: Re: [TN] PCB Fab Question Regarding Bow and Twist

Dale,

All of the 10 boards were from the same manufacturing lot...

Leland

-----Original Message-----
From: Dale Ritzen [mailto:[log in to unmask]]
Sent: Friday, July 13, 2007 7:55 AM
To: 'TechNet E-Mail Forum'; Leland Woodall
Subject: RE: [TN] PCB Fab Question Regarding Bow and Twist

Were the two that remained flat from a different PCB date code than the others that didn't?

Dale Ritzen
Quality Manager
Austin Manufacturing Services


-----Original Message-----
From: Leland Woodall [mailto:[log in to unmask]]
Sent: Friday, July 13, 2007 4:20 AM
To: [log in to unmask]
Subject: Re: [TN] PCB Fab Question Regarding Bow and Twist


Ido, Ian, Lee, and others,
 
We've already tried an experiment with ten bare boards.  These were essentially flat at start, and went through two reflow excursions.  Only two remained flat, and the others saw twist measuring between 0.28 and 0.87 mm.

If two can remain flat, why can't the others?
 
Today we ran 488 through only first side reflow and had 21 boards we were afraid to further populate.  Five escaped that process and went on to receive top side components before being discovered.  These ranged in measurement between 0.88 and 1.96 mm.  Our 256 pin QFP with good coplanarity characteristics has had problems with unsoldered leads at 0.60 mm, but the majority of our problems have appeared when the overall twist is between 2 and 3 mm.  

IPC standards dictate a maximum twist of 0.75% for SMT applications after soldering.  That would equate to approximately 3.2 mm overall for our 187 mm board.
 
Internal standards from our mother company say that 1 mm of twist should give us about 1000 microstrains upon casement (which I haven't yet verified).  Anything above that, in their opinion, could cause a reliability concern, particularly with ceramic caps.
 
With today's reject rate above 4% we're experiencing a disaster.
 
We had two confirmation jigs built during the last two days that cost us over $1,000.  I'm sending four samples out to AkroMetrix
(www.warpfinder.com) tomorrow to perform shadow moiré testing beneath thermal application of our present profiles.  That's about another $10,000 for expedited service.  I can only test bare boards with this process, so I'm not certain what the resultant data will tell me.  Two of the samples will be flat, and the other two will measure 1 mm.
 
What else can I do in order to solve this problem?
 
Sorry for being such a burden...
 
Leland

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ido Mashall
Sent: Thursday, July 12, 2007 3:40 PM
To: [log in to unmask]
Subject: Re: [TN] PCB Fab Question Regarding Bow and Twist

I suggest reflowing the board without component to see If its connected to component or residual stress from the fabrication processes (faster cooling time after lamination, or "flattening boards"
after fabrication to send them flat...)
(surely in appropriate and validated reflow parameters) Ido Mashall Beyond Materials

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ian Hanna
Sent: Thursday, July 12, 2007 10:11 PM
To: [log in to unmask]
Subject: Re: [TN] PCB Fab Question Regarding Bow and Twist

The problem is that the unpopulated boards meet the requirements -- they do not warp until the assembly process -- this does not violate the
(6012) bare-board or the (4101) raw material acceptability specs...I suspect that the root-cause lays in the lamination, however there are many other factors that can influence of course -- but spec-wise, the bare-boards pass...Ian

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee Parker
Sent: Thursday, July 12, 2007 2:27 PM
To: [log in to unmask]
Subject: Re: [TN] PCB Fab Question Regarding Bow and Twist

Leland

I would first characterize the boards using the parameters in the 620 document. If the boards are out of spec, I would inquire as to why these defective boards are being shipped. The cause is often best left to the manufacture (you would probably have to do an in-plant audit to begin to identify the root cause). The first place I would look is at the raw material; does it meet your specification.

Best regards

Lee

J. L. Parker Ph.D.
JLP Consultants LLC
(804) 779 3389


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Leland Woodall
Sent: Thursday, July 12, 2007 12:03 PM
To: [log in to unmask]
Subject: [TN] PCB Fab Question Regarding Bow and Twist

Everyone,

I have a product that ran for almost a year with little or no problem.
Recently we've started seeing unsoldered pins on a 256 pin QFP, and found the cause to be excessive twist in the board.

We have verified that no changes have been made to our process.  Reflow temps, cooling rates, conveyor speeds, rail parallelism, and transfers are all good.  We've checked incoming raw material and found only slight deflection in a few specimens.

A couple of examples:

Incoming:	0.13 MM
B reflow:	0.66 MM
A reflow	1.98 MM

We've identified assemblies that have excessive twist after each of the reflow operations, and our once good product is becoming an expensive stepchild.  We cannot mount twisted boards into cases because of too much strain, and are forced to scrap this material.

What in the PCB manufacturing process might have changed that would cause this scenario?

Thanks in advance for your input.

Leland

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