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July 2007

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Subject:
From:
Dave Seymour <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Dave Seymour <[log in to unmask]>
Date:
Fri, 27 Jul 2007 16:20:31 -0400
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Go via plug....

Here is a fabrication note I worked up with the fab shop.

"All vias drilled equal to or less than .0xx shall be plated, then
filled with non conductive material, such as Peter's paste # SD-2361,
or equivalent. Surface to be planar prior to final plating and
metallization.
Boards must be suitable for via in pad technology."

http://www.peters.de/

I would recommend working with your fabricators to find the best solution
to your requirement. Without mentioning names, Most large fab houses can
handle
this either internally or through subcontractors.

Most prefer to flood the entire board, rather than be selective.


Hope this helps,

Dave



West, Jim wrote:

>Hi,
> 
>We have an application where we are using a QFN/SON package that has one
>large exposed pad at the bottom of the package.  In order to ensure good
>electrical characteristics and thermal protection, the chip manufacturer
>recommends a thermal pad via design.  The recommendation is to use 6
>via's within the large pad placed on a 1.0mm pitch to help facilitate
>the thermal relief.  In addition, they suggest 0.3mm diameter drill
>holes.  There are several suggestions on what one would do to these
>via's to reduce the exposure of excess voiding during the reflow
>process.  One suggestion is via tenting top side only, second suggestion
>is via tenting bottom side only, third suggestion is via plugging from
>the bottom side, and finally the fourth suggestion is via encroached
>from the bottom.
> 
>As I look at these suggestions,  I would probably utilize the via
>tenting top side only, since this would probably result in smaller
>voids, but one of the risks is a hindrance of proper paste printing.
>Options 2 and 3, I would think that there would be an increased in out
>gassing and voiding.  The fourth option would cause reduced voiding, but
>could cause a lower standoff of the package, causing improper soldering
>conditions.
> 
> 
>Anyone have a thoughts/experience on how to handle this type of
>application?
> 
>Best Regards,
> 
>
>
>Jim West
>Engineering Manager
>Nexergy Inc.
>www.nexergy.com
>tel: (614) 351-6216
>fax: (614) 324-1979
>
>
>
>This email message and all attachments transmitted with it are intended solely for the use of the addressee(s) and may contain legally privileged, protected or confidential information. If you believe that you have received this message in error, please notify the sender immediately by email reply and please delete this message from your computer and destroy any copies.
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-- 
Dave Seymour, CID+
Catapult Communications Inc.
800 Perimeter Park Dr, Suite A
Morrisville, NC 27560

Direct: (919)653-4249
Main: (919)653-4180
Fax: (919)653-4297

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