Fellow Techies.

 

I would like some comment on defining / interpreting a component's
package peak temperature rating.  Everyone seems to have their own spin
on this subject when a component exceeds its rated package peak
temperature rating by a only few degrees (e.g., < 5 degrees) and all the
other components on the board are within their peak limits.

 

Periodically to facilitate smt profiling, a CM will  asked me what the
package peak component temperature is and I typically default to either
the component manufacturer's  published value or to J-STD-020C, Table
4-1 (and Table 5-2) for Sn-Pb assembly. For example, table 4-1 gives a
peak temperature of say 225 +0/-5 C.  They often then ask if they can
exceed the 225 C limit slightly (e.g., by 5 C) if it is for say less
than 10 seconds.

 

Questions - 

1) What is the idea behind specifying a tolerance of +0, -5 C and how
should the "-5 C "tolerance referenced in the above example impact the
actual package peak component temperature rating when determining a
thermal profile recipe?  Maybe Note 1 below table 4-2 yields some
insight. Reflow oven temperature control variation?

 

2) Is there a calculation or rationale based on total time at or above
the "peak" temperature that allows for some limited amount of time above
the peak rating (e.g., allowed to go to 230 C if time above 225 C is < 5
seconds)

 

3)  Is the reflow oven's ability to control temperature within +/- X
degrees typically taken into account when determining the "true" package
peak temperature?

 

Thanks again,

-Joe 

 


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