Subject: | |
From: | |
Reply To: | |
Date: | Mon, 11 Jun 2007 15:37:34 -0400 |
Content-Type: | text/plain |
Parts/Attachments: |
|
|
(if you bristle a little at the comments about "unsuccessful track record
from the old embedded technology", I understand (Denny)
***********************************
EPTE Newsletter from DKN Research,
#722, June 10, 2007
(www.dknresearch.com)
Topics of the Week
JPCA Show 2007 (Part II)
The most popular topic explored at the exhibition was embedded components
in printed circuits. A special seminar was held to discuss this new
technology; many companies speculated about the technologies; and a
significant number of exhibition booths featured some proposals with the
embedded passive technologies. This could be a revival for the embedded
passive technology that was prominent in the U.S. several years ago.
Industry experts recalled the unsuccessful track record from the old
embedded technology; therefore, new thought processes and ideas were
forthcoming from many companies. One big difference is the embedding of
the actual chips into electronic components. Multilayer board
manufacturers are embedding not only passive components, but also active
chips; in particular small size ICs. The small size chip components are
mounted on the pads of inner layers instead of the outer layers of
multi-layer boards. Surprisingly, several multi-layer board manufacturers
and flexible circuits? manufacturers exhibited a similar concept for
embedding technology with low profile CSP (Chip Scale Package) produced by
a WLP (Wafer Level Package) process.
An engineer from a board manufacturer explained to me this approach, which
could evolve into a standard for the electronics industry in Japan. More
than two dozen companies, mostly multi-layer board manufacturers, flexible
circuit manufacturers and chip device suppliers have formed an R&D
consortium called EWLP (Embedded Wafer Level Package). Their main goal is
to develop new concepts for the embedding technology. Semiconductor and
circuit board manufacturers who are members of the consortium have teamed
up. Semiconductor manufacturers are provided special small and thin WLP
chips. Accordingly, the circuit board manufacturers are developing similar
embedding technology for the WLP devices based on the same specifications.
Difficulties could arise from the embedding of the small size passive
components as well as the embedding of WLP because of smaller sized chips.
Nowadays, 0603 sized components are very common for cellular phone boards
in Japan. Since companies are developing 0402 and 0201 size components
for the next generation packaging, chips thinner than 0.2 mm are already
available. It is thinner than one hundredth of inch and comparable to one
conductor layer of a multilayer board.
Several board manufacturers are trying to employ the traditional
technology approach with the embedded passive components that include the
screen-printing process with special paste materials or lamination &
etching process for special laminates form register and dielectric
materials. But most manufacturers are considering a combination with the
other technologies. They explain that the traditional embedded passive
technologies are not competitive for both circuits density or
manufacturing cost compared to the standard SMT technologies with small
chip components or new embedded chip component technology.
By the way, I asked many companies to comment about the volume production
and plans to use the new technology in actual applications. Unfortunately,
no one would prognosticate or provided me with a clear direction for the
actual applications. They all agreed the new embedded technology remains
at the R&D stage, and it needs more time before the next step - actual
volume application.
I hope the new embedded technology does not suffer the same fate as its
predecessor. Good luck!
Dominique Numakura, DKN Research ([log in to unmask])
|
|
|