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March 2007

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Subject:
From:
Ryan Grant <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Fri, 2 Mar 2007 14:15:27 -0700
Content-Type:
text/plain
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text/plain (236 lines)
Frank, 

Are you certain the board shop didn't symmetrize your asymmetrical
design?  After demanding our board shops return a stack up proposal for
our approval, we found our impedance controlled 'asymmetrical' boards
were coming back as 'symmetrical'.  

In the board shop's defense, asymmetrical stack ups are not entirely
reasonable.  After questioning various boards shops concerning this, I
always got one of two responses: 1.) it's impossible, 2.) you can have
it, but you will have to really pay for it!  Meaning, rather than
utilize the whole panel, only the center portion of the panel is used
due to warping.  Now that we're better educated, we make compromises
we're willing to live with at the design stage instead of unknown
compromises the board shop will make in order to manufacture the board.

Ioan,

Assuming your stack up is symmetrical, you can flip flop the panels.
However, keep in mind that the board shops will use a 'trick' of running
the ground plane of a core facing up and the controlled impedance signal
side facing down.  This gives a more predictable and consistent etching
rate since etchant can drip off the bottom of the panel instead of
rolling across the top before dripping off as it is sprayed onto the
panel.  If you flip flop, make sure the that the signal and grounds
don't both end up on the same side of a core.  (Although it is still
workable to have signals on both sides of a core...)  In the case you
stated below, grounds and signals will still properly match when you
flip flop.

Thanks,
Ryan

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Frank Kimmey
Sent: Friday, March 02, 2007 12:32 PM
To: [log in to unmask]
Subject: Re: [TN] Flip-flop panels

Ioan,
You've listed the biggest of the Pros here, but could also add the
evener distribution of coppers (less warping).
Unfortunately it looks like from the impedance requirements you listed
this particular design will not work well with flip-flop panelizing.
You need to have matched impedance layer for layer if you want to flip
flop and you will need to assure the distance between layers is
consistent top to bottom (symmetrical stackup).
The Design you describe might work, but sounds a little risky and
probably should be experimented with prior to taking to volume.
Flip-flop panelization usually works best with the simpler boards that
have a low enough part count to load in a single pass.
I don't know how comfortable I would be if I found out my CM was doing
flip-flop with my controller impedance designs (most of my multilayers
are asymmetrical due to design requirements). 
Hope it helps,
FNK

Frank N Kimmey CID+
Principal PCB Designer
PCB Programs
Powerwave Technologies Inc
Office 916-941-3159
Fax 916-941-3195
Mobile 916-670-0645

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Tempea, Ioan
Sent: Friday, March 02, 2007 11:16 AM
To: [log in to unmask]
Subject: Re: [TN] Flip-flop panels

John,

Steve is right on the money. Best solution for JIT, one piece flow. When
the mechanical-test-packing cell is almost out of boards, you just flip
the boards half assembled, with no down time for changeover, and start
supplying again.

Regards,

Ioan

-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Steve Gregory
Sent: Friday, March 02, 2007 2:09 PM
To: [log in to unmask]
Subject: Re: [TN] Flip-flop panels


Hi John,

I've built panels that had flip-flopped boards before, (small narrow
double-sided SMT boards for a bar code reader pen), and it made things
so easy. One stencil, one SMT set-up, to do both sides of the panel on
one line.

After they come out of the reflow oven from the first side (and they've
cooled down of course), you just stick them right back in the screen
printer for the other side without so much as missing a beat...pretty
cool, eh?

-Steve Gregory-  

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of John Parsons
Sent: Friday, March 02, 2007 12:51 PM
To: [log in to unmask]
Subject: Re: [TN] Flip-flop panels

Ioan,

Why would you want to design an array like this?

John Parsons

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Tempea, Ioan
Sent: Friday, March 02, 2007 10:23 AM
To: [log in to unmask]
Subject: [TN] Flip-flop panels

Hi Technos,

the flip-flop nickname actually comes from the Technet, I heard it right
here some time (years) ago. What I mean is the panels made up by arrays
of alternating top-bottom patterns.

I know that the layer stackup has to be symmetrical, that the copper
weight has to be symmetrical, but what about the controlled impedance
boards? Let's say a 12 layer PCB, that calls for:
4.0 mil lines: 56 ohm trace impedance +/- 10% layers 2,4,5,8,9,11
6.5 mil lines: 50 ohm trace impedance +/- 10% layers 4,9,11
8.1 mil lines: 45 ohm trace impedance +/- 10% layers 4,8,9 8.0 mil
lines: 56 ohm trace impedance +/- 10% layers 1,12

Is this PCB a good candidate for flip-flopping?

And it is just now that I realized it has 12 layers? Any limitations
coming from layer count?

And even better, I have one other board with microvias and blind/burried
vias. Can this be flip-flopped?

Thank you,

Ioan

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