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March 2007

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TechNet E-Mail Forum <[log in to unmask]>, Inge <[log in to unmask]>
Date:
Sun, 11 Mar 2007 23:12:23 +0100
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Wayne,
CCLK pin = 0.2us pulses (bits?) for about 1 second when power is switched 
on, then CCLK is steady 'High'
ad0-ad17 from flash to FPGA= no continous bitstream
Done=High / Init=High (donow what state is normal)
?
Inge

----- Original Message ----- 
From: "Wayne Thayer" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Sunday, March 11, 2007 3:59 PM
Subject: Re: [TN] FPGA (DSP)


> Hi Inge!
>
> Send the board to a logic specialist!
>
> It sounds like the part isn't configuring.  Debugging that usually
> requires no more than an oscilloscope, except that it depends on whether
> the board designer left access to the important pins.  I don't have the
> data sheet in front of me right now, but some of the key pins for
> configuration include:  Two "Mode" pins, which control how the device
> configures (slave, where someone else provides the clock; master, where
> the Xilinx provides the clock; serial data configuration mode; or
> parallel configuration mode); CCLK, which stands for "configuration
> clock"; INIT, which can hold off configuration; and DONE, which tells
> you whether the device thinks it configured.  Also, there is the serial
> data line (or parallel data bus for the parallel configuration) which
> carries the configuration from the flash to the part.  The first thing
> to do is to get an oscilloscope on CCLK.  If none comes up when the
> power is first applied, then probably INIT or the MODE pins are not in
> the right state.  If there is no movement on the DATA line(s) going from
> the flash to the 4013, then maybe someone forgot to program the FLASH.
> INIT is mostly an input which causes re-configuration, but if you review
> the data sheet for the part, you will also see that INIT is also an
> output indicator that something is wrong with the configuration bit
> stream.
>
> As I said, as long as you can get to the signals, you can figure this
> out.  Even if its a BGA, the ones made at that time had lines running to
> the edge of the part which were for "bussing" for gold plating the
> wirebond pads.
>
> Good Luck,
>
> Wayne Thayer
>
>>>> [log in to unmask]  >>>
> Hi all,
> TechNet member's knowhow got no limits, so I try this, despite not usual
> PWB topic. Have some FPGAs for DSP that don't work at all. CLK A and B
> are  OK,  checked  with a scope on the inputs, all 5V Vcc's are OK, but
> when I apply stimuli on the various inputs, I get no reaction on any
> data outputs. Very primitive test method, I know, but I thought that at
> least something would come out to show that the device isn't completly
> dead. The flash memory is external, I've tried with both disabled and
> enabled flash, nothing helps. I can't remove the FPGAs, so I have to
> test them on the assembled board. I've tried various triggers too. An
> advanced troubleshooting would include logic analysers, external pattern
> generators and a special test adapter. That's for a logic specalist,
> which I'm not. My question is this: Does anyone of you have a proposal
> how to test, simple way, if the FPGAs are dead or alive? The FPGAs are
> Xilinx 4013, made in numbers of 'millions', very popular some years ago.
> A fresh board costs 30,000 USD, hoped to escape that cost.
> Inge
>
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