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March 2007

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Subject:
From:
Jeffrey Bush <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Jeffrey Bush <[log in to unmask]>
Date:
Fri, 23 Mar 2007 08:23:33 -0400
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Knoop.

Jeffrey Bush
Director, Quality Assurance and Technical Support
VERMONT CIRCUITS INCORPORATED 
           76 Technology Drive - POB 1890 
              Brattleboro, Vermont 05302
                Voice - 802.257.4571 ext 37 
                    Fax - 802.257.0011
                       <http://www.vtcircuits.com/> 
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of arnaud grivon
Sent: Friday, March 23, 2007 6:19 AM
To: [log in to unmask]
Subject: [TN] Hardness Characterization of a PCB Surface Finish

Hello TechNet,

What would be the adequate technique(s) to characterize the hardness of 
a given PCB surface finish (resistance to electrical test probe impact)?
Concerns are varying marks of electrical test probes after assembly 
depending on the PCB source.
Regards,

A. Grivon

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