There is an effort to address most of these matters in the IPC 1601
Document.  Unfortunately, that effort is not yet complete.  Best you may
find is an outline on the IPC website. 

Rich K / GTS


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Scott Lefebvre
Sent: Monday, March 26, 2007 1:58 PM
To: [log in to unmask]
Subject: [TN] PCB PACKAGING MATERIAL & Baking Question

We have been transitioning our assemblies to a lead free process and
doing so have changed our FAB material and solder finish to ENIG.  I was
going to request the PCB shops vacuum seal with desiccant and a moisture
indicator using a see through ESD material.  One of the main reasons is
to prevent moisture absorption.  We are a low volume high mix
manufacturing facility.  Some of our FAB's sit on the shelve for up to a
6-12 months.  Board thickness varies from .063 to .145".

 

We could bake the boards prior to assembly but this is a process I am
trying to limit to specific boards that are high risk.  My understanding
baking boards also have risk and can cause the intermetallic layer to
increase with ENIG boards.  I've read this in several white papers and
in seminars I've attended.

 

Any suggestions on packaging methods or packaging materials for PCB's
would be appreciated.  Also what others are doing about baking PCB's and
if it is a standard practice you are doing for all your boards.

 

Thank you for your comments on this topic greatly appreciated!

 

Scott Lefebvre

 


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