Blair,
It's not easy to catch the train running by, but I'll try to check what
you say. The memory scope trigger level is little tricky.
(The world of logics should be simple, because it's all logic, but to
me it seems very complex, therefore it must be that I don't think
logically myself....then, if I don't think logically, I must be an
analogue. Is that a logic conclusion? If it is, then I may be a little
logic thinking after all..)
Thanks for the tip!
Inge
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Hogg, Blair K.
Sent: den 13 mars 2007 13:56
To: [log in to unmask]
Subject: Re: [TN] FPGA (DSP)
Inge,
When looking at data signals check for levels in between high and low,
which would be indicative of two outputs shorted. I'll try to draw a
text picture (you'll need to look at this in a font that the space and
dash are the same length, or all characters have the same spacing, like
Courier):
Normal:
--| |--| |--|
| | | | |
|-----| |--------| |---
Shorted:
--| |--| /intermediate levels indicate a short
| | | |--| |--| with another signal
|-----| |---| |-| |---
When you find two signals that show these intermediate levels, they are
the ones shorted together. This could cause the devices to load
incorrect information and function improperly.
Blair
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Inge
Sent: Monday, March 12, 2007 4:33 PM
To: [log in to unmask]
Subject: Re: [TN] FPGA (DSP)
Wayne,
1. There are 100us pulse packages for a second or fraction of a second
on all a0 - a17 2. There are pulses on all d0 - d7 to for a short
moment.
3. All three devices goes to High on Done (if I wait 15 seconds before
switching on power again) 4. INIT shows a pulse train too before going
to High.
The conclusion may be that the 4013s are all OK.
The reason for all this troubleshooting is, that the PC screen has a
Status display, that shows whether all functions work or not. E.g.
encoders , CPU alive, motor functions etc. The FPGAs are involved in
this presentation.
The fact that there is no movement at all on the Status screen, may not
be because of dead FPGAs then, but may be caused by other devices that
send inhibit or shutdown signals to the FPGAs.
So, with your help, it seems as we can conclude, that the 4013s get
configured, and that the failure is to be searched for somewhere else.
How to find that/those failure sources, that's another story, which
seems to be offside my original question.
Thanks Wayne, we may continue offline ?
Inge
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