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February 2007

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TechNet E-Mail Forum <[log in to unmask]>, BADRI <[log in to unmask]>
Date:
Wed, 28 Feb 2007 12:33:57 +0530
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Hello,

Had a nightmare in this issue last week. The boards we were assembling had
open vias in the pad. All the solder flowed thru the via to the bottom side
leaving nil solder for the component. We had to go for a redesign of the
PCB. Try to avoid via on pad.

Thanx
Badri

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Carl VanWormer
Sent: Tuesday, February 27, 2007 10:28 PM
To: [log in to unmask]
Subject: [TN] Via in Pad question

I am looking for guidance on using vias in pads of surface mount
components.  The concept is great for high speed design, since it gives
the least inductance for mounting bypass caps.  It sounds easy, but I'm
sure there are some pitfalls and there may be some rules I will break.
Any guidance towards documents on this combination would be appreciated.
Also, any stories to scare me away from this approach will be fun to
hear.

Later,
Carl





Carl Van Wormer
Cipher Systems
1800 NW 169th Place, Suite B-100
Beaverton, OR  97006
Phone (503)-617-7447 extension 20    

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