"Webuild some boards at a class 3 shop and we require at least one microsection per panel"
Your statement is a puzzle, since if you had the boards built to IPC-6012, Class 3 the board shop was obligated to perform two microsections per panel,at a minimum (without additional registration tools), and those microsections would have included the large component holes as well as the small vias. The holes are to be constructed as they are on the boards, so if non-functionals have been removed on the boards, the microsections also would have had them removed.
The microsections would have also have been subjected to Thermal Stress testing per IPC-TM-650, Method 2.6.8
Susan Hott
Susan Hott
President
Robisan Laboratory, Inc
6502 E 21st Street
Indianapolis, IN 46219
317-353-6249 phone
317-917-2379 fax
www.robisan.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of John Foster
Sent: Tuesday, February 27, 2007 1:29 PM
To: [log in to unmask]
Subject: Re: [TN] need help with cracking vias
I typically will use a 8 mil annular ring. 8 mils per side. In this
case since it was a 1mm BGA I went down to a 7.5 mil annular ring.
So a 10 mil hole in a 25 mil pad. The drilling was execellent darn
near the exact center of the holes. This shop does remove non functional
pads. It was interesting. We build some boards at a class 3 shop and
we require at least one microsection per panel. I did notice that they
leave the non functional pads. But anyway. I went over to the shop
and they microsectioned vias that I knew were bad. As soon as they
looked at the microsections they immediately offered to build new
boards free of charge. I explained that there was a lot more cost
involved i.e. assembly parts etc etc. They agreed to do our next
job for free which will be a very intense and expensive board.
Our management felt this was a very fair swap.
SoI think they are being pretty good about the whole thing. They
are pretty shocked and are doing a lot of work to try to understand
what went wrong. They think that perhaps when the boards went for
enig that they might have been over micro etched. I have been using
this shop for 10 years and literally this is the first failed board
I have ever gotten from them.
Even though we were not able to fill the vias with solder before
microsectioning because they were plugged with soldermask I would
still like to post the pics of the microsections and get some
opinions. They are not the best microsections but I think they
still show the problem. There is cracking and the plating is
very good on the ends but thins down in the middle a great deal.
We microsectioned a 40 mil hole and it looks picture perfect.
Anyway isn't there some site that you send pics to for viewing.
Thanks for all of the input so far from everyone. I have learned a lot.
John Foster
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Paul O' Connor
Sent: Tuesday, February 27, 2007 12:32 AM
To: [log in to unmask]
Subject: Re: [TN] need help with cracking vias
I've carried out some trials in this area so I'd be interested to find out
what the problem turns out to be in the end. One q I'd put to the fab house
is wheter or not they removed the unused innerlayer pads on one PCB & not on
the other, the unused pads definitely improve the life expectancy of the
vias in my expierence. If space allows on your designs it would be
benificial to increase the annular ring on the inner layer signal vias, this
will help reduce the number of hole /pad breakout instances & give the hole
a 360deg anchor point on each layer.
As other posters mentioned the copper thickness in the hole walls is also
important 1.2 -1.4mil if possible.
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