TECHNET Archives

February 2007

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Haynes, Kim" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Haynes, Kim
Date:
Sat, 24 Feb 2007 16:22:17 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (100 lines)
Hello John,
I have had issues with via cracking.  In our case these are lab boards
which are cycled trough temps from -5C to +85C.  Over about a six month
period I had eight boards die.  When the last test was done and the
final board died, I set out to see what was the matter and how to
prevent the issue again.  The last board died about 45 minutes after the
last test point.  Murphy got there too late, that does not happen very
often.  I had some of the vias in a dead board sectioned and analysized.
The micro-sections did not show obvious cracks so we ran a study with
the reflow oven and two boards.  We had a board from the "bad" material
and a board from some "good" material.  The boards were tested using the
golden netlist tester that the board fab shop uses to test product
before shippment.  Both boards were cycled through the oven at
70mm/minute and 235C in groups of three passes through the oven.  After
the oven cycle, the boards were tested on the netlist tester again.
After two cycles we began to see a few opens on the "bad" board.  The
boards were heated through five cycles total and the bad board had more
opens on each cycle after the first one and the "good" board had no
failures of either opens or shorts at all.  The failing nets were
micro-sectioned and via cracks were seen.  Another note of interest is
that these boards are built using silver-filled epoxy in the small vias.
The plating seen in some of the vias was as thin as 0.1 mil.  The spec
that our boards are built to is 1mil minimum and all fabs must include a
mounteed microsection and digital pictures.  I do have an advantage here
because the shop that fabs the boards is also the shop that assembles
the boards so I do not get the "its his fault" argument from two
sub-contactors pointing at each other.  I implemented a few changes to
all boards done by our group which I have included in an attachment that
I thought you might find interesting.  I also included some vias that
are what I want to see when I check a new fab run.  If you have a blank
board from each lot of material, I would recommend that you try a test
like the one I described above. It is difficult for a fab or assembly
shop to argue with data taken in a concise manner, especially if it is
well documented.

Good luck,
Kim Haynes
High-Speed Serial Link Applications
Texas Instruments, Inc.
214-567-2057   Telephone
 
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of John Foster
Sent: Saturday, February 24, 2007 12:43 PM
To: [log in to unmask]
Subject: [TN] need help with cracking vias

I was wondering if I could get a opinion on some problems we are having
with vias. Built two different types of getek boards 10 layer .062. Both
types have over 2000 10 mil vias. One set of boards went through
everything and are doing fine. The other set went through the same fab
shop and same assembly shop.

The second set of boards passed electrical test at the fab house but
after assembly and the start of useage the boards are developing opens
like crazy in the 10 mil holes. I am going over on Monday to get some
cross sections of actual bad vias. I just wanted to get some ideas of
what to look for. If the barrels show cracks can you tell anything by
where the cracks are? If the plating is too thin will it make the vias
much more likely to crack during reflow.

I am just trying to really understand what happened so that it doesn't
happen again. But the vias just continue to open you fix one and the
board works for awhile and then another one opens up.

I am thinking that if there is adequate plating in the bad holes then
the assembly shop either ran the boards to hot or for too long and the z
axis expansion killed me. Is it possible that something in the plating
process caused the vias to be inadeqaute. Doesn't the plating have to
have some ductility to it?


any input will really be appreciated

Thanks
John Foster

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 1.8e To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for
additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 1.8e
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------

ATOM RSS1 RSS2