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February 2007

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Subject:
From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Tue, 6 Feb 2007 10:33:36 -0600
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This is good input, Ahne. Thank you for taking the time to add this. 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ahne Oosterhof
Sent: Tuesday, February 06, 2007 10:29 AM
To: [log in to unmask]
Subject: Re: [TN] Spacing Requirement for Adjacent PFP pads carrying 70V

See also note from Bill Brooks: 
http://listserv.ipc.org/scripts/wa.exe?A2=ind0107&L=DesignerCouncil&D=0&
T=0&
P=5539

Air, DC: 75-100V/mil
AC: use 3x rms value
UL-61010A-1

There are rules and there are rules! Most of them have grown out of
painful experiences and some have come from testing. The first ones are
good, the second ones can be questioned.

There are many variables when it comes to voltages and spacings. The
Engineering Handbook gives some give numbers, but they apply to sealevel
usage and clean environments. So you have to know under what conditions
rules were established.

If the product is going to be used at altitudes over 10,000 ft, the
spacings have to increase. If the environment is dirty (e.g. full of
dust, rich in sulfur fumes as near a refinery) the spacings have to
increase. Not at 70V, but at higher voltages when you have sharp points
the spacings have to increase. I would not trust the solder mask to
provide any protection, just consider it a bonus in the margin of
safety.

But these are all things the design engineer has to know and account
for. If he does not, I would send him an e-mail (written documentation!)
and point out the discrepancies in the design. Or at review meetings
bring the subject up. You don't weant to be holding the bag when the
product fails in the customer's hands.

One thing you can do to improve your situation is to cut a space between
the conductors. Air is a better insulator than circuit board material.
However, it does weaken the board. 

Compromises, compromises; life is full of them.

Have fun anyway,
Ahne.




-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of valerie St. Cyr
Sent: Tuesday, 30 January, 2007 10:37
To: [log in to unmask]
Subject: [TN] Spacing Requirement for Adjacent PFP pads carrying 70V

Dear Technetters,

I have a design issue to resolve that involves spacing and voltage. I
have read IPC-2221 6.3 Electrical Clearance and all the sub-sections,
including Table 6-1, electrical Conductor Spacing, as has the Engineer
and we cannot agree on the application. So, if someone could address
this specific problem, especially if you have a design like what I will
describe, that would be most helpful.

We have a 1.5 mm (.059") pitch Press-Fit connector; the surface pads are
1.19 mm (.047") with pad to pad spaces of .30 mm (.012"). Adjacent pins
carry 70 Volts. Do we or do we not need to put soldermask up onto the
pads?
Depending on how one reads the spec, the spacing conductor to conductor
needs to be either .13 mm (.005") with mask or .60 mm (.023"). 
It's clear reading the spec that "conductor" means trace because 6.3.4
excludes soldering lands (I don't know why; they are conductive). (ps: 
this is not a harsh environment product; it is installed in either a
clean factory and/or office-like environment). He discounts the Bare
Board column
B4 since the pads are uncoated (soldermask clearances) and hence he
argues there is effectively no mask even though we have mask between
pads. 
If we discount the mask between pads, then we need to use column B2,
which is .60 mm, which we don't have.  So, to have .6 mm "spacing", the
Engineer wants to encroach mask onto the pads. 

When I look at the Assembly columns, the section titles say for
component leads ...  the leads are roughly .50 mm (.020") and so on 1.5
mm pitch, are 1.0 mm apart (.025"); if 6.3.6 and 6.3.7 do apply to
"leads" and not the pads they terminate in, then the spacing is fine at
either the .13 or the .50 mm spacing. But the Engineer is reading the
Assembly columns as terminations, and we can't meet .50 mm spacing
(uncoated); so 

We are at a stalemate.  While we don't need to make solder filets
because the connector is press-fit, the Engineer wants soldermask
encroachment. We can't agree, first, if they need to be encroached; and
then, second, if they do, how much over we need to go.

The problem is that with registration issues thrown in, the fabricator
is getting lots of false opens at shorts-and-opens electrical test
because the probes are hitting the mask more often that not. (He already
designed it with mask opening +4 mils over FHS.)

How do we interpret Table 6-1 (if at all) for pads carrying 70 volts?

Thank you, thank you, thank you in advance.

Regards, Valerie

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