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January 2007

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Subject:
From:
George Patrick <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Sat, 6 Jan 2007 12:37:14 -0800
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Minor compensation for impedance controlled traces is one thing, major editing like you are outlining is quite another.  Any shop that did something like this to one of our designs would either be doing it again for free, or would be de-sourced faster than the street food in Shanghai goes through you.

Here's how we handle it:

First, we incorporate all of the fab vendor's requirements into a standard DRC set for the CAD system, and the ERFs of the DFM tool so we can design it "right" in the first place, and can check the design and be sure that there are no excuses for the fab vendor to WANT to make changes to the design other than the normal compensation necessary for their process.  Part of this is requiring the vendors to supply their _real_ requirements, not just the ones they publish in their road-maps.  We also stipulate that, although we understand optimization for their process, non-compensation changes require our approval.  These usually happen while the boards are still in prototype turns, and are approved and incorporated into the designs for the next revision.  You know, "concurrent engineering."

Next, we require all our vendors to send us ODB++ or gerber files of the final panel artwork they are generating for manufacturing.  The designer has the responsibility of comparing them to the original "single-up" files we provided and provide either approval for the vendor to begin fabrication, or questions to the vendor if the reason for artwork changes is not obvious to them.  Obviously, this lengthens the time needed to start the board turn, but we have found that it trains both our designers AND the vendor CAM Operators on what to avoid and has resulted in better, cleaner designs going out over time.

If the board is a quick turn the manufacturer is allowed to build without approval and will share in scrap charges if errors are found and have to be corrected (depending on whose error it was).  Since these are usually prototypes of new products, the number of boards scrapped is fairly small and relatively painless, and the learning process is still in place since the panel artworks are still inspected.

We also use multiple vendors, but in our case all the fabricators who would potentially be building the board have the chance to look over the stackup and provide comments and changes to it before the design is past the preliminary stages.  We do not release a board to fabrication until all the potential vendors have signed off on the stackup.  This minimizes artwork adjustments for impedance control.

This doesn't weed out ALL problems, but it has helped us.  I understand the push to let the fabricators do their job to produce the cheapest board possible, but with no controls on what they are doing there are going to be too many cases like what happened to your friend.

YMMV :)

-- 
George Patrick
Tektronix, Inc.
Central Engineering, EDS Application Support
P.O. Box 500, M/S 39-512
Beaverton, OR 97077-0001
Å 503-627-5272 (voice)     Æ 503-627-5587 (fax)
http://www.tektronix.com    http://www.pcb-designer.com

"Off grid and Proud of it!"



-----Original Message-----
From: DesignerCouncil on behalf of Jack Olson
Sent: Sat 1/6/2007 8:54 AM
To: [log in to unmask]
Subject: [DC] CAM Guy Gone Wild!
 
A friend of mine (not on this list) asked me what I would do
about something, and I didn't know (can you imagine that?)

He is experiencing horrible problems with a product that
should have worked as designed, only to discover that the
CAM guy in China went crazy with editing! It took WEEKS
to discover what he had done.
The original design was primarily 5/5mil traces/clearances
and this guy increased the plan clearances under BGAs to
10 for some reason, claiming "More Manufacturable". He
also did all kinds of weird pad shaving and stuff which is
mysterious but probably irrelevent. The poblem was that
under the BGAs the added clearance took away return path
for signals and I think even isoalted portions of ground from
each other, and now the board won't even boot up!

Now, I know many of you are gonna say you don't let vendors
edit data, and even add notes to the drawing to prevent it.

I'm not one of those people. We use several different vendors
and if we want 5 mil traces and one vendor knows that their
process consistently over-etches traces and they want to
beef them up to 5.5 knowing that the end result will be 5,
FINE!
I am very happy when a vendor knows what to do to
give me what I want. I actually DEPEND on them to edit
whatever they need to give me my 50 ohm impedance, rather
than forcing me to specify seperate sets of detailed con-
structions to suit each of our appoved vendors. Since our
products last 20 years or more, I don't even know WHO will
be building them in the year 2020, so I DEPEND on them
to do what is necessary to make the reliable product.

That said, where do you draw the line between edits to give
the desired results, and some "wanna be a designer" CAM
guy making all kinds of "improvements"?

What should I tell my friend to do about these very expensive
boards that don't work?

Jack

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