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November 2006

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Subject:
From:
stephengregory5849 <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, stephengregory5849 <[log in to unmask]>
Date:
Mon, 27 Nov 2006 11:23:49 -0600
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Hi Pearl!

Send em' my way, I'll get them up eventually!

-Steve-

----- Original Message -----
From: "pearl petras" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, November 27, 2006 10:02 AM
Subject: [TN] More delam


> Arggghh,
>  More delamination. Looks like poor quality PCB's -  a simple quick test
> adjustment to a component seems to be causing a lot of boards to 'pop' in
> the same area.  As well, others are popping in the area of a
> hand-installed edge connector, when they start to solder the center pin.
> Even just tinning the pad does it sometimes.
>  What would you do with boards like this?
>  Would you try to fix it?  How?
>  Would you scrap it?  There are some very expensive IC's on this board.
>  Do you think it may go deeper than one layer?
>  It is a 10 layer PCB
>  IPC-A-600 states:
>    -The imperfection does not reduce the space between conductive patterns
> below the minimum conductor spacing. (OK - minimum conductor spacing for
> low voltage is ~0.1mm)
>  -The blister or delamination does not span more than 25% of the distance
> between adjacent conductive patterns.  (What does this mean?  adj patterns
> on the same layer as the delam? or do you consider 3-D, if the conductive
> patterns are on a different layer but the bubble spans underneath them?)
>    -There is no propagation as a result of thermal testing that replicates
> the manufacturing process. (would you try more hand-soldering, or would
> you try a reflow process, how would you mimic it?)
>
>
>
>  Steve, could I trouble you to post another few pics?
>
>  Thanks all.
>
>
> ---------------------------------
>
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