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October 2006

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Subject:
From:
Heather Gregg <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Fri, 6 Oct 2006 11:46:08 +0200
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I'm being told that our Fuji CP-7 is having trouble reading the board
fiducials. The cause is said to be a build-up of too much SN100 plating
on the fid. We currently use a simple dot fid. The dot is 1mm in
diameter and it is made so that there is a 0.25mm ring of bare board
around it before you get to the solder mask. Our PCB supplier has
recommended going to a doughnut design, but our SMT department is
skeptical that this will solve the build-up of SN100 issue. Personally,
I'm not convinced that it is not a problem with the machine vision system.

That being said, I'm wondering what the "best" fid design would be. What
are/ where can I find recommendations for fids? Does anyone else have
experience with this sort of problem? Should the fid be covered with
solder mask? What design is the most robust in regards to minimizing the
effects that processing variables cause (such as plating build-up,
uneven plating, camera lighting bumped out of alignment, etc.)?

Inquiring mind,
Hg

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