She quoted the right spec, paragraph, table etc., just seemed as though it
was interpreted different than it should have been. And I've seen in the
past, people (sic-designers, assemblers, etc) consider solder mask as an
insulator in the same manner.
Franklin
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Roger Stoops
Sent: Thursday, September 21, 2006 10:47 AM
To: [log in to unmask]
Subject: Re: [TN] Mechanical Hardware Clearance...
Technically, the spec you quoted is for uncoated boards. You can thus
interpret it as you wish.
However, like everybody else said, a non-conductive washer is in order
here...
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Abel, Shannon K.
Sent: Thursday, September 21, 2006 11:13 AM
To: [log in to unmask]
Subject: Re: [TN] Mechanical Hardware Clearance...
It is relavent when my PM is asking. While I know its not best practice, I
need to find what the correct answer is.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Whittaker, Dewey
(EHCOE)
Sent: Thursday, September 21, 2006 11:01 AM
To: [log in to unmask]
Subject: Re: [TN] Mechanical Hardware Clearance...
IMHO
It is irrelevant whether you violated any guideline or not. Do not ever
mount any conductive entity over a trace which then relies solely on the SM
for electrical protection.
Dewey
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Abel, Shannon K.
Sent: Thursday, September 21, 2006 7:44 AM
To: [log in to unmask]
Subject: [TN] Mechanical Hardware Clearance...
I have a board with a 15VDC trace on the surface layer that runs under a
flat washer.
The trace is covered by SM, which provides 500vdc isolation per .001 mil of
SM coating.
2221 states that any electrical conduction trace per sec 6.3 lists a minimum
clearance of .00512 to any other conductive surface (.ie mechanical
hardware)
Do I violate the spec.
Any help would be greatly appreciated.
Shannon Abel
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