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August 2006

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Subject:
From:
"Victor G. Hernandez" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Wed, 9 Aug 2006 11:05:59 -0500
Content-Type:
text/plain
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text/plain (107 lines)
A punched PWB results in frayed edges susceptible to moisture ingress and thus delamination.   This is not a standard practice.   I believe IPC does not support this process.

Victor,

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Colin McVean
Sent: Wednesday, August 09, 2006 10:44 AM
To: [log in to unmask]
Subject: Re: [TN] Routed edge tolerance

A punched FR4 4 layer? Good grief!

Colin McVean M.Inst.C.T.
Production Manager
Artetch Circuits Limited
Main: 01903 725365
DD:    01903 712926
Email: [log in to unmask]
www.artetch.co.uk
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of arnaud grivon
Sent: 09 August 2006 16:28
To: [log in to unmask]
Subject: Re: [TN] Routed edge tolerance

Jim,

I won't be able to answer your question, but just want to share a past 
experience with punched PCB.

Punched PCBs have rough edges compared with routed PCBs. These rough 
edges make it easier for water to run along the glass fibers of the PCB 
and can create short circuits with internal power planes. This was the 
root cause of catastrophic failures (burning) occuring on an electronic 
equipment (I cannot disclose the details).
Granted, the product was poorly designed as the power plane was close to 
the PCB edges (By the way, it was also a price sensitive 4 layer PCB).

Just a thought.

Best regards,

A. Grivon

James Verrette a écrit :
> I am trying to figure out what the minimum clearance would need to be
> between a PCB and a housing that it fits into.  The piece I am not sure
> on is the tolerance of the routed edge of the PCB.  The PCB is about
> .050 thick and the outline is quite complex with curved edges and
> cutouts.  What is the maximum variation in the routed edge that I can
> expect from the typical mid-high volume board fabricator?  I have been
> told +/-.005 hole to edge and +/-.005 edge to edge.  But what is the
> yield at this tolerance?  It is just for straight line routs?  The board
> is 4 layers and cost sensitive, so we don't want to over specify the
> edge dimension tolerance and drive up cost or limit ourselves to select
> few board shops.  
>  
> I have also seen quotes from Asian sources recommend punching instead of
> routing.  Where is a good source of layout design guidelines for this
> process? Does it yield good results? I have some knowledge of
> singualtion punching, but not in the board fabrication process. 
>  
> Jim Verrette
> Electrical Engineer
>  
>
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