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Reply To: | (Designers Council Forum) |
Date: | Thu, 31 Aug 2006 18:50:37 +0530 |
Content-Type: | text/plain |
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Dear Experts,
In one of our design we see that signal round trip delay (clock 'high
to low' transition and data arrival) is beyond the timing requirement of
the microcontroller used. The microcontroller expects the data to arrive
within 14 nanoseconds after the clock pulse is activated but the data is
reaching only after 16 nanoseconds delay and hence the device fails. No
over shoots or undershoots are noticed in the clock signal, the clock
frequency is 24 MHz with rise time of about 4 to 5 nano seconds. The PCB
trace length cannot be reduced. Costly PCB material (for low relative
permittivity) is not acceptable being a cost effective product.
How to handle this issue? Your expert guidance will be of great use.
Sincerely
K.Balasubramanian
Project Leader - Hardware.
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