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July 2006

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Subject:
From:
Franklin D Asbell <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Franklin D Asbell <[log in to unmask]>
Date:
Fri, 7 Jul 2006 13:44:52 -0500
Content-Type:
text/plain
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text/plain (67 lines)
Regardless of the cause, or the process inducing warp, the same tolerance
applies.

Franklin

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Dominguez Alejandro
JuP/TEF8
Sent: Friday, July 07, 2006 12:11 PM
To: [log in to unmask]
Subject: [TN] PCB Warpness

Folks,
I'm looking for information related to PCB warpness on the second pass.  I
have heard from PCB manufacturers the so called "memory effect". Apparently
when a PCB is being manufactured and the material is not cooled down
properly between process, the material gets twisted and the manufacturer
places heavy-flat surfaces on top to flatten it and have it to the customers
flatness specification. Once the material gets heated again (during the
first pass) the material twists again to the manufacturer stage.  
We know that IPC specifies a recommended warpness on raw PCB's but doesn't
have any recommendation for material that has been reflowed and that suffers
this memory effect.
Does anybody have a standard used with their suppliers for processed
material that is being used as a specification for this warpness prior to
the processing of this second pass?

> Best regards / Saludos cordiales / Mit freundlichem Grüßen
> 
Alejandro A. Domínguez

> Robert Bosch Corporation
> SMT Process Engineering Manager (JuP/TEF8B)
> 11970 Pellicano Drive Suite 100
> El Paso, TX 79936 - USA
> www.bosch.us
> 
Tel: 1 (915) 541-8391
Tel: +52 (656) 688-2301 ext 6391  (México)
> mailto:[log in to unmask]
> 
> 

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